Design of wide dynamic range MOS current mirror using nano dimension MOS field effect transistor
Authors
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Astha Dadheech
*
1
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Nikhil Raj
1
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Divyang Rawal
1
Abstract
A nanoscale metal oxide semiconductor field effect transistor based current mirror circuit operating in a sub volt supply for low power analog applications has been proposed in this paper. Current mirror is a fundamental block of current-mode circuits. In the proposed research, current mirror uses a level-shifted folded flipped voltage follower cell for class AB mode of operation. Usually at nano meter scale, the conventional architecture performance especially for analog gets deteriorates, so to meet the goal proposed design incorporates locally generated feedback & level shifter approach. It also shows improved wide current dynamic range with the use of folding transistors. The current mirroring is performed using folded MOS transistors along with feedback which increases the current mirroring range, results in low input resistance in megahertz range bandwidth. For improvement in output resistance, the architecture uses regulated cascode along with super transistor approach. The performance of the proposed current mirror has been validated small signal analysis and their simulations and corner analysis on Cadence. As observed, the current mirroring is performed with minimum error to 2 milli amperes consuming headroom of 0.14 volt. The input & output resistance is calculated as 1.35 ohm & 2.11 giga ohms respectively. The proposed current mirror is designed in 180 nano meter technology & operates at
0.5 volt.
Graphical Abstract
Keywords
References
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