| Abstract |
: |
Reversible logic is becoming increasingly important in the design of low-power CMOS circuits, reversible circuits have given rise to what is called a quantum computer which is introduced by them with the aim of minimizing energy losses in the form of heat at the end of the lost bits and of performing more complex functions by taking into account certain criteria showing their performance, namely a number of gates ,a number of outputs garbage, a quantum cost, a delay and a hardware complexity. in this article, we will try to exploit a pre-existing article designing the asynchronous circuits in reversible mode, namely Circuit Implementation by latch using reversible logic gates and T Flip Flop sensitive to falling edge clock using reversible logic gates in order to obtain better results, by increasing their following performances quantum cost and the hardware complexity compared to our basic article. |
