e-ISSN : 0975-4024 p-ISSN : 2319-8613   
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ABSTRACT

ISSN: 0975-4024

Title : Energy Efficient Design of Logic Circuits Using Adiabatic Process
Authors : E. Chitra,N. Hemavathi, Vinod Ganesan
Keywords : Adiabatic logic, Charge improvement, Low power, Energy efficient digital designs, Sinusoidal power clock
Issue Date : Dec 2017-Jan 2018
Abstract :
In today’s electronic industry the Low power has emerged a principle theme. The most important features of modern electronic equipment is energy efficiency, it is designed using high speed and its portable applications. Power consuming can be reduced by adopting different style which is said to be excellent solution to low powerelectronic appliances. The adiabatic logic will be used as an efficient energytechnique for digital designs in this paper. The proposed system offers low power dissipation when compared to conventional CMOSlogic [1-6]. This paper provides full adder in various adiabatic logic styles and its results are compared to conventional CMOS logic. This simulation output specifiesas that proposed system is beneficial for various low power digital applications.
Page(s) : 4501-4511
ISSN : 0975-4024 (Online) 2319-8613 (Print)
Source : Vol. 9, No.6
PDF : Download
DOI : 10.21817/ijet/2017/v9i6/170906153