| Title: | OS19-3 A Hardware-Oriented Random Number Generation Method and A Verification System for FPGA |
|---|---|
| Publication: | ICAROB2021 |
| Volume: | 26 |
| Pages: | 12-15 |
| ISSN: | 2188-7829 |
| DOI: | 10.5954/ICAROB.2021.OS19-3 |
| Author(s): | Sansei Hori, Hakaru Tamukoh |
| Publication Date: | January 21, 2021 |
| Keywords: | FPGA, Hardware Accelerator, Xillybus, Deep Learning, Random Number Generator, RBM |
| Abstract: | Deep learning technology has made remarkable progress in recent years and has been applied to a variety of applications such as smartphones and cloud servers. These systems employ dedicated processors to save power consumptions and process massive data. In this paper, we introduce a hardware-oriented restricted Boltzmann machine and propose a field-programmable gate array (FPGA) infrastructure for easy verification of user circuits. The infrastructure makes it easy to communicate and control between the host PC and the user circuit. |
| PDF File: | https://alife-robotics.co.jp/members2021/icarob/data/html/data/OS/OS19/OS19-3.pdf |
| Copyright: | © The authors. This article is distributed under the terms of the Creative Commons Attribution License 4.0, which permits non-commercial use, distribution and reproduction in any medium, provided the original work is properly cited. See for details: https://creativecommons.org/licenses/by-nc/4.0/ |
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