Abstract
This paper presents the design and characterization of an efficient high-output-power 55 GHz fundamental oscillator. The performance parameters of the oscillator are analysed as a function of the contributors of the tank capacitance, and the design choices in the varactor for phase noise and for tuning range are exemplified. The circuit was implemented in 22 nm FD-SOI CMOS technology and occupies 0.046 mm2 area including the matching network. On-wafer measurement results have demonstrated 6.5 dBm peak output power, 22% peak DC-to-RF efficiency and −98.3 dBc/Hz phase noise at 1 MHz offset frequency, while the core draws 8.3 mW power. To the best knowledge of the authors, the efficiency is the best, while the output power is the second best among CMOS oscillators in the same frequency range, and the phase noise is the best result for V-band fundamental CMOS oscillators reported to date.
Funding source: Sächsisches Staatsministerium für Wissenschaft und Kunst http://dx.doi.org/10.13039/501100006114
Award Identifier / Grant number: PROSECCO
Funding source: Sächsische Aufbaubank http://dx.doi.org/10.13039/501100006298
Award Identifier / Grant number: PROSECCO
Acknowledgment
The authors thank GlobalFoundries for the fabrication of the chip and acknowledge the research cooperation with the DFG CeTI project in the area of 60 GHz circuit design.
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Author contributions: All the authors have accepted responsibility for the entire content of this submitted manuscript and approved submission.
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Research funding: This research work was publicly funded by Sächsisches Staatsministerium für Wissenschaft, Kultur und Tourismus (SMWK) and Sächscische Aufbaubank (SAB) through the Product Security and Communication (PROSECCO) project.
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Employment or leadership: None declared.
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Honorarium: None declared.
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Conflict of interest statement: The authors declare no conflicts of interest regarding this article.
References
[1] B. Philippe and P. Reynaert, “A 126 GHz, 22.5% tuning, 191 dBc/Hz FOMt 3rd harmonic extracted class-F oscillator for D-band applications in 16nm FinFET,” in 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Los Angeles, CA, USA, IEEE, 2020, pp. 263–266. iSSN: 2375-0995.10.1109/RFIC49505.2020.9218397Search in Google Scholar
[2] Y. Hu, T. Siriburanon, and R. B. Staszewski, “A low-flicker-noise 30-GHz class-F23 oscillator in 28-nm CMOS using implicit resonance and explicit common-mode return path,” IEEE J. Solid State Circ., vol. 53, no. 7, pp. 1977–1987, 2018, https://doi.org/10.1109/jssc.2018.2818681.Search in Google Scholar
[3] A. Tarkeshdouz, M. Haghi Kashani, E. Hadizadeh Hafshejani, S. Mirabbasi, and E. Afshari, “An 82.2-to-89.3 GHz CMOS VCO with DC-to-RF efficiency of 14.8,” Dig. Pap. - IEEE Radio Freq. Integr. Circuits Symp., vol. 2019, pp. 331–334, 2019.10.1109/RFIC.2019.8701729Search in Google Scholar
[4] Z. Zong, M. Babaie, and R. B. Staszewski, “A 60 GHz frequency generator based on a 20 GHz oscillator and an implicit multiplier,” IEEE J. Solid State Circ., vol. 51, no. 5, pp. 1261–1273, 2016, https://doi.org/10.1109/jssc.2016.2528997.Search in Google Scholar
[5] Y. C. Chiang and Y. H. Chang, “A 60 GHz CMOS VCO using a fourth-order resonator,” IEEE Microw. Wireless Compon. Lett., vol. 25, no. 9, pp. 609–611, 2015, https://doi.org/10.1109/lmwc.2015.2451356.Search in Google Scholar
[6] H. Jia, B. Chi, L. Kuang, and Z. Wang, “A 47.6-71.0-GHz 65-nm CMOS VCO based on magnetically coupled π-type LC network,” IEEE Trans. Microw. Theor. Tech., vol. 63, no. 5, pp. 1645–1657, 2015, https://doi.org/10.1109/tmtt.2015.2415487.Search in Google Scholar
[7] T. Drechsel, N. Joram, and F. Ellinger, “An ultra-wideband 3-23 GHz VCO array with high continuous tuning range for FMCW radar application,” in 2019 12th German Microwave Conference (GeMiC), Stuttgart, Germany, IEEE, 2019, pp. 103–106. iSSN: 2167–8022.10.23919/GEMIC.2019.8698168Search in Google Scholar
[8] K. Peng, C. Lee, C. Chen, and T. Horng, “Enhancement of frequency synthesizer operating range using a novel frequency-offset technique for LTE-A and CR applications,” IEEE Trans. Microw. Theor. Tech., vol. 61, no. 3, pp. 1215–1223, 2013, https://doi.org/10.1109/tmtt.2012.2237182.Search in Google Scholar
[9] P. You and T. Huang, “A switched inductor topology using a switchable artificial grounded metal guard ring for wide-FTR MMW VCO applications,” IEEE Trans. Electron. Dev., vol. 60, no. 2, pp. 759–766, 2013, https://doi.org/10.1109/ted.2012.2234750.Search in Google Scholar
[10] E. Hegazi, H. Sjöland, and A. A. Abidi, “A filtering technique to lower LC oscillator phase noise,” IEEE J. Solid State Circ., vol. 36, no. 12, pp. 1921–1930, 2001, https://doi.org/10.1109/4.972142.Search in Google Scholar
[11] M. Garampazzi, P. M. Mendes, N. Codega, D. Manstretta, and R. Castello, “Analysis and design of a 195.6 dBc/Hz peak fom p-n class-B oscillator with transformer-based tail filtering,” IEEE J. Solid State Circ., vol. 50, no. 7, pp. 1657–1668, 2015, https://doi.org/10.1109/jssc.2015.2413851.Search in Google Scholar
[12] T. Forsberg, J. Wernehag, A. Nejdel, H. Sjöland, and M. Törmänen, “Two mm-wave VCOs in 28-nm UTBB FD-SOI CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 27, no. 5, pp. 509–511, 2017, https://doi.org/10.1109/lmwc.2017.2690845.Search in Google Scholar
[13] J. Rimmelspacher, R. Weigel, A. Hagelauer, and V. Issakov, “A quad-core 60 GHz push-push 45 nm SOI CMOS VCO with-101.7 dBc/Hz phase noise at 1 MHz offset, 19% continuous FTR and -187 dBc/Hz FoMT,” in ESSCIRC 2018 - IEEE 44th Eur. Solid State Circuits Conf., Dresden, Germany, IEEE, 2018, pp. 138–141.10.1109/ESSCIRC.2018.8494241Search in Google Scholar
[14] V. Issakov, F. Padovan, J. Rimmelspacher, R. Weigel, and A. Geiselbrechtinger, “A 52-to-61 GHz push-push VCO in 28 nm CMOS,” in 2018 48th Eur. Microw. Conf. EuMC 2018, Madrid, Spain, IEEE, 2018, pp. 1009–1012.10.23919/EuMC.2018.8541550Search in Google Scholar
[15] J. Rimmelspacher, R. Weigel, A. Hagelauer, and V. Issakov, “60 GHz tail-node-coupled multi-core push-push VCOs in 22 nm FD SOI CMOS technology,” in 2018 48th European Microwave Conference (EuMC), Madrid, Spain, IEEE, 2018, pp. 997–1000.10.23919/EuMC.2018.8541563Search in Google Scholar
[16] D. Murphy, H. Darabi, and H. Wu, “Implicit Common-mode Resonance in LC Oscillators,” IEEE J. Solid State Circ., vol. 52, pp. 812–821, 2017.10.1109/JSSC.2016.2642207Search in Google Scholar
[17] L. Li, P. Reynaert, and M. S. J. Steyaert, “Design and analysis of a 90 nm mm-wave oscillator using inductive-division LC tank,” IEEE J. Solid State Circ., vol. 44, no. 7, pp. 1950–1958, 2009, https://doi.org/10.1109/jssc.2009.2020245.Search in Google Scholar
[18] A. Basaligheh, P. Saffari, W. Winkler, and K. Moez, “A wide tuning range, low phase noise, and area efficient dual-band millimeter-wave CMOS VCO based on switching cores,” IEEE Trans. Circuits Syst. I Regul. Pap., vol. 66, no. 8, pp. 2888–2897, 2019, https://doi.org/10.1109/tcsi.2019.2901253.Search in Google Scholar
[19] C. W. Byeon and C. S. Park, “A high-efficiency 60-GHz CMOS transmitter for short-range wireless communications,” IEEE Microw. Wireless Compon. Lett., vol. 27, no. 8, pp. 751–753, 2017, https://doi.org/10.1109/lmwc.2017.2723999.Search in Google Scholar
[20] Z. Tibenszky, C. Carta, and F. Ellinger, “An efficient 70 GHz divide-by-4 CMOS frequency divider employing low threshold devices,” Electron. Lett., vol. 57, no. 14, pp. 545–547, 2021, https://doi.org/10.1049/ell2.12171.Search in Google Scholar
[21] Z. Tibenszky, C. Carta, and F. Ellinger, “A 0.35 mW 70 GHz divide-by-4 TSPC frequency divider on 22 nm FD-SOI CMOS technology,” in 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Los Angeles, CA, USA, IEEE, 2020, pp. 243–246. iSSN: 2375–0995.10.1109/RFIC49505.2020.9218362Search in Google Scholar
[22] C. Zhang and M. Otto, “A wide range 60 GHz VCO using back-gate controlled varactor in 22 nm FDSOI technology,” in 2017 IEEE SOI-3D-Subthreshold Microelectron. Unified Conf. S3S 2017, vol. 2018, Burlingame, CA, USA, IEEE, 2018, pp. 1–3.Search in Google Scholar
[23] W. Wu, J. R. Long, and R. B. Staszewski, “High-resolution millimeter-wave digitally controlled oscillators with reconfigurable passive resonators,” IEEE J. Solid State Circ., vol. 48, no. 11, pp. 2785–2794, 2013, https://doi.org/10.1109/jssc.2013.2282701.Search in Google Scholar
[24] Q. Wu, T. K. Quach, A. Mattamana, et al.., “Frequency tuning range extension in LC-VCOs using negative-capacitance circuits,” IEEE Trans. Circuits Syst. II: Express Briefs, vol. 60, no. 4, pp. 182–186, 2013, https://doi.org/10.1109/tcsii.2013.2251939.Search in Google Scholar
[25] L. Li, P. Reynaert, and M. S. Steyaert, “A 60-GHz CMOS VCO using capacitance-splitting and gate-drain impedance-balancing techniques,” IEEE Trans. Microw. Theor. Tech., vol. 59, no. 2, pp. 406–413, 2011, https://doi.org/10.1109/tmtt.2010.2095425.Search in Google Scholar
[26] L. Fanori and P. Andreani, “Highly efficient class-C CMOS VCOs, including a comparison with class-B VCOs,” IEEE J. Solid State Circ., vol. 48, no. 7, pp. 1730–1740, 2013, https://doi.org/10.1109/jssc.2013.2253402.Search in Google Scholar
[27] D. B. Leeson, “A simple model of feedback oscillator noise spectrum,” Proc. IEEE, vol. 54, no. 2, pp. 329–330, 1966, https://doi.org/10.1109/proc.1966.4682.Search in Google Scholar
[28] P. Kinget, “Integrated GHz voltage controlled oscillators,” in Analog Circuit Design, Boston, MA, Springer, 1999, pp. 353–381.10.1007/978-1-4757-3047-0_17Search in Google Scholar
[29] J. van der Tang and D. Kasperkovitz, “Oscillator design efficiency: a new figure of merit for oscillator benchmarking,” in 2000 IEEE International Symposium on Circuits and Systems (ISCAS), vol. 2, Geneva, Switzerland, IEEE, 2000, pp. 533–536.10.1109/ISCAS.2000.856383Search in Google Scholar
[30] A. Hajimiri and T. H. Lee, “A general theory of phase noise in electrical oscillators,” IEEE J. Solid State Circ., vol. 33, no. 2, pp. 179–194, 1998, https://doi.org/10.1109/4.658619.Search in Google Scholar
[31] T. H. Lee and A. Hajimiri, “Oscillator phase noise: a tutorial,” IEEE J. Solid State Circ., vol. 35, no. 3, pp. 326–336, 2000, https://doi.org/10.1109/4.826814.Search in Google Scholar
[32] J. Victory, Z. Yan, G. Gildenblat, C. McAndrew, and J. Zheng, “A physically based, scalable MOS varactor model and extraction methodology for RF applications,” IEEE Trans. Electron. Dev., vol. 52, no. 7, pp. 1343–1353, 2005, https://doi.org/10.1109/ted.2005.850693.Search in Google Scholar
[33] T. Soorapanth, C. P. Yue, D. K. Shaeffer, T. I. Lee, and S. S. Wong, “Analysis and optimization of accumulation-mode varactor for RF ICs,” in 1998 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.98CH36215), Honolulu, HI, USA, IEEE, 1998, pp. 32–33.10.1109/VLSIC.1998.687993Search in Google Scholar
[34] X. Jin, J.-J. Ou, C.-H. Chen, et al.., “An effective gate resistance model for CMOS RF and noise modeling,” in International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217), San Francisco, CA, USA, IEEE, 1998, pp. 961–964.Search in Google Scholar
[35] R. Torres-Torres, R. S. Murphy-Arteaga, and S. Decoutere, “MOSFET gate resistance determination,” Electron. Lett., vol. 39, no. 2, pp. 248–250, 2003, https://doi.org/10.1049/el:20030124.10.1049/el:20030124Search in Google Scholar
[36] E. Hegazi and A. Abidi, “Varactor characteristics, oscillator tuning curves, and AM-FM conversion,” IEEE J. Solid State Circ., vol. 38, no. 6, pp. 1033–1039, 2003, https://doi.org/10.1109/jssc.2003.811968.Search in Google Scholar
[37] P. Andreani and S. Mattisson, “On the use of MOS varactors in RF VCOs,” IEEE J. Solid State Circ., vol. 35, no. 6, pp. 905–910, 2000, https://doi.org/10.1109/4.845194.Search in Google Scholar
[38] S. N. Ong, S. Lehmann, W. H. Chow, et al.., “A 22 nm FDSOI technology optimized for RF/mmWave applications,” in Dig. Pap. - IEEE Radio Freq. Integr. Circuits Symp., Philadelphia, PA, USA, IEEE, 2018, pp. 72–75.10.1109/RFIC.2018.8429035Search in Google Scholar
[39] S. N. Ong, L. H. K. Chan, K. W. J. Chew, et al.., “22 nm FD-SOI technology with back-biasing capability offers excellent performance for enabling efficient, ultra-low power analog and RF/Millimeter-Wave designs,” in 2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Boston, MA, USA, IEEE, 2019, pp. 323–326. iSSN: 2375-0995.10.1109/RFIC.2019.8701768Search in Google Scholar
[40] A. Hajimiri and T. H. Lee, “Design issues in cmos differential LC oscillators,” IEEE J. Solid State Circ., vol. 34, no. 5, pp. 717–724, 1999, https://doi.org/10.1109/4.760384.Search in Google Scholar
[41] D. Fritsche, G. Tretter, C. Carta, and F. Ellinger, “Millimeter-wave low-noise amplifier design in 28-nm low-power digital CMOS,” IEEE Trans. Microw. Theor. Tech., vol. 63, no. 6, pp. 1910–1922, 2015, https://doi.org/10.1109/tmtt.2015.2427794.Search in Google Scholar
[42] M. Cui, C. Carta, and F. Ellinger, “Two 60-GHz 15-dBm output power VCOs in 22-nm FDSOI,” IEEE Microw. Wireless Compon. Lett., vol. 31, no. 2, pp. 184–187, 2021, https://doi.org/10.1109/lmwc.2020.3037515.Search in Google Scholar
[43] Y. Wang, J. Xu, K. He, M. Wu, and R. Zhang, “A 67.4–71.2-GHz nMOS-only complementary VCO with buffer-reused feedback technique,” IEEE Microw. Wireless Compon. Lett., vol. 29, no. 12, pp. 810–813, 2019, https://doi.org/10.1109/lmwc.2019.2949937.Search in Google Scholar
[44] A. H. M. Shirazi, A. Nikpaik, R. Molavi, et al.., “On the design of mm-wave self-mixing-VCO architecture for high tuning-range and low phase noise,” IEEE J. Solid State Circ., vol. 51, no. 5, pp. 1210–1222, 2016, https://doi.org/10.1109/jssc.2015.2511158.Search in Google Scholar
[45] X. Luo, H. J. Qian, and R. Stazewski, “A waveform-shaping millimeter-wave oscillator with 184.7dBc/Hz FOM in 40nm digital CMOS process,” in 2015 IEEE MTT-S International Microwave Symposium, Phoenix, AZ, USA, IEEE, 2015, pp. 1–3. iSSN: 0149–645X.10.1109/MWSYM.2015.7167075Search in Google Scholar
[46] J. Yin and H. C. Luong, “A 57.5–90.1-GHz magnetically tuned multimode CMOS VCO,” IEEE J. Solid State Circ., vol. 48, no. 8, pp. 1851–1861, 2013, https://doi.org/10.1109/jssc.2013.2258796.Search in Google Scholar
[47] S. D. Toso, A. Bevilacqua, A. Gerosa, and A. Neviani, “A thorough analysis of the tank quality factor in LC oscillators with switched capacitor banks,” in Proceedings of 2010 IEEE International Symposium on Circuits and Systems, Paris, France, IEEE, 2010, pp. 1903–1906. iSSN: 2158-1525.10.1109/ISCAS.2010.5537949Search in Google Scholar
[48] B. Sadhu, M. Ferriss, and A. Valdes-Garcia, “A 52 GHz frequency synthesizer featuring a 2nd harmonic extraction technique that preserves VCO performance,” IEEE J. Solid State Circ., vol. 50, no. 5, pp. 1214–1223, 2015, https://doi.org/10.1109/jssc.2015.2414921.Search in Google Scholar
[49] S. T. Nicolson, K. H. K. Yau, P. Chevalier, et al.., “Design and scaling of w-band sige bicmos vcos,” IEEE J. Solid State Circ., vol. 42, pp. 1821–1833, 2007, https://doi.org/10.1109/jssc.2007.900769.Search in Google Scholar
[50] C.-H. Lin, W.-P. Li, and H.-Y. Chang, “A fully integrated 2.4-GHz 0.5-W high efficiency class-E voltage controlled oscillator in 0.15-µm PHEMT process,” in Asia-Pacific Microwave Conference 2011, Melbourne, VIC, Australia, IEEE, 2011, pp. 864–867. iSSN: 2165–4743.Search in Google Scholar
[51] Z. Tibenszky, C. Carta, and F. Ellinger, “58 GHz CMOS VCO with 16% efficiency,” Electron. Lett., vol. 56, no. 24, pp. 1301–1303, 2020.10.1049/el.2020.2015Search in Google Scholar
[52] Z. Tibenszky, D. Fritsche, C. Carta, and F. Ellinger, “An efficient wide tuning range –0.4 dBm 65 GHz NMOS VCO on 22 nm FD-SOI CMOS,” in 2020 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), Hiroshima, Japan, IEEE, 2020, pp. 37–39.10.1109/RFIT49453.2020.9226238Search in Google Scholar
[53] J. Xu, K. He, Y. Wang, R. Zhang, and H. Zhang, “A 79.1-87.2 GHz 5.7-mW VCO with complementary distributed resonant tank in 45-nm SOI CMOS,” IEEE Microw. Wireless Compon. Lett., vol. 29, no. 7, pp. 477–479, 2019, https://doi.org/10.1109/lmwc.2019.2919939.Search in Google Scholar
[54] T. Xi, S. Guo, P. Gui, D. Huang, Y. Fan, and M. Morgan, “Low-phase-noise 54-GHz transformer-coupled quadrature VCO and 76-/90-GHz VCOs in 65-nm CMOS,” IEEE Trans. Microw. Theor. Tech., vol. 64, no. 7, pp. 2091–2103, 2016, https://doi.org/10.1109/tmtt.2016.2574716.Search in Google Scholar
[55] J. Rimmelspacher, R. Weigel, A. Hagelauer, and V. Issakov, “LC tank differential inductor-coupled dual-core 60 GHz push-push VCO in 45 nm RF-SOI CMOS technology,” in 2019 IEEE 19th Top. Meet. Silicon Monolith. Integr. Circuits RF Syst. SiRF 2019, Orlando, FL, USA, IEEE, 2019, pp. 1–3.10.1109/SIRF.2019.8709120Search in Google Scholar
[56] C. Hung and R. Gharpurey, “A 57-to-75 GHz dual-mode wide-band reconfigurable oscillator in 65 nm CMOS,” in 2014 IEEE Radio Frequency Integrated Circuits Symposium, Tampa, FL, USA, IEEE, 2014, pp. 261–264. iSSN: 2375–0995.10.1109/RFIC.2014.6851714Search in Google Scholar
[57] W. Fei, H. Yu, H. Fu, J. Ren, and K. S. Yeo, “Design and analysis of wide frequency-tuning-range CMOS 60 GHz VCO by switching inductor loaded transformer,” IEEE Trans. Circuits Syst. I Regul. Pap., vol. 61, no. 3, pp. 699–711, 2014, https://doi.org/10.1109/tcsi.2013.2284000.Search in Google Scholar
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