In recent years, hardware implementation of image processing is important to make embedded devices high performance and low-power. Hardware can be automatically generated by using high level synthesis (HLS) technology. The generated hardware becomes large, leading to increased chip size and price when a target image processing includes multiple functions. If we can introduce the concept of software dynamin link library (DLL) to hardware, large-scale processing software can be implemented in a small device which leads to price reduction. Our research aims to realize hardware level DLL that contains the circuit data of the HLS hardware in a library and dynamically reconfigures the required hardware module in a library on demand by Dynamic Partial Reconfiguration (DPR) on FPGA. To accomplish our research objective, this paper establishes a unified design flow from HLS hardware generation to circuit data generation. In addition, this paper develops a hardware platform supporting dynamic runtime-link of HLS hardware module. The experimental result shows that hardware runtime-link can be accomplished correctly and the reconfiguration time can be negligibly small.