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Using the Wave Layout Style to Boost the Digital ICs Electrical Performance in the Radioactive Environment

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© 2015 ECS - The Electrochemical Society
, , Citation Rafael Navarenho de Souza et al 2015 ECS Trans. 66 71 DOI 10.1149/06605.0071ecst

1938-5862/66/5/71

Abstract

This paper presents an experimental comparative study between the Metal-Oxide-Semiconductor Field Effect Transistors (MOSFET) manufactured with the Wave ("S" gate geometry) and the standard layout (CnM) considering the Total Ionizing Dose (TID) effects and taking into account that the devices were biased during the radiation procedure to emphasize the effects. Due to the special layout characteristics and the different effects of the bird's beaks regions of the Wave MOSFET (WnM) compared to the conventional rectangular layout, this innovative layout proposal for MOSFETs is able to improve the device TID tolerance without adding cost to the Complementary MOS (CMOS) manufacturing process.

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10.1149/06605.0071ecst