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Design space exploration for complex automotive applications: an engine control system case study

Published:18 January 2016Publication History

ABSTRACT

With technological advances, significant changes are taking place in automotive domain. Modern automobile combines functionalities ranging from safety critical functions such as control systems for engine to navigation and infotainment. To meet the performances requirements of these systems, automotive industry is shifting to multi-core systems. This increases the design complexity. Efficient and fast design space exploration frameworks are required to deal with this design complexity. This paper presents a framework for exploring automotive application design on multi-core systems. It considers an automotive-specific application modeling language named Amalthea and a distributed-memory multi-core system architecture for execution. The effectiveness of our framework is shown on an engine control application.

References

  1. McPAT, 2015. http://www.hpl.hp.com/research/mcpat.Google ScholarGoogle Scholar
  2. Reducing CO2 emissions from passenger cars., 2015. http://ec.europa.eu/clima/policies/transport/vehicles/cars/index_en.htm.Google ScholarGoogle Scholar
  3. AMALTHEA: Model Based Open Source Development Environment for Automotive Multi-Core Systems. 2015. http://www.amalthea-project.org/.Google ScholarGoogle Scholar
  4. AUTOSAR: AUTomotive Open System ARchitecture. 2015. http://www.autosar.org/.Google ScholarGoogle Scholar
  5. B. Dai, A. Pinto, and E. A. Lee. On-time network on-chip: Analysis and architecture. Technical Report UCB/EECS-2009-59, EECS Department, University of California, Berkeley, California, USA, 2009.Google ScholarGoogle Scholar
  6. DreamCloud. Deliverable 3.2 - Dynamic power management, 2015. http://www.dreamcloud-project.org/results.Google ScholarGoogle Scholar
  7. P. Frey. Case Study: Engine Control Application. Technical Report 2010-03, Ulmer Informatik-Berichte, 2010.Google ScholarGoogle Scholar
  8. The gem5 Simulator System. 2015. http://www.gem5.org/.Google ScholarGoogle Scholar
  9. A. Gerstlauer, S. Chakravarty, M. Kathuria, and P. Razaghi. Abstract system-level models for early performance and power exploration. In 17th Asia and South Pacific Design Automation Conference (ASP-DAC), pages 213--218, 2012.Google ScholarGoogle ScholarCross RefCross Ref
  10. A. Gerstlauer, J. Peng, D. Shin, D. Gajski, A. Nakamura, D. Araki, and Y. Nishihara. Specify-explore-refine (ser): From specification to implementation. In Design Automation Conference, 2008. DAC 2008. 45th ACM/IEEE, pages 586--591, June 2008. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. K. Goossens, J. Dielissen, and A. Radulescu. Aethereal network on chip: concepts, architectures, and implementations. Design Test of Computers, IEEE, 22(5):414--421, Sept 2005. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. M. Gries. Methods for evaluating and covering the design space during early design development. Integr. VLSI J., 38(2):131--183, Dec. 2004. Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. L. Indrusiak and O. dos Santos. Fast and accurate transaction-level model of a wormhole network-on-chip with priority preemptive virtual channel arbitration. In Design, Automation Test in Europe Conference Exhibition (DATE), pages 1--6, 2011.Google ScholarGoogle Scholar
  14. F. Koushanfar, A.-R. Sadeghi, and H. Seudie. EDA for secure and dependable cybercars: Challenges and opportunities. In 49th ACM/EDAC/IEEE Design Automation Conference (DAC), pages 220--228, 2012. Google ScholarGoogle ScholarDigital LibraryDigital Library
  15. Z. Lu, R. Thid, M. Millberg, and A. Jantsch. Nnse: Nostrum network-on-chip simulation environment. In In Proc. of SSoCC, 2005.Google ScholarGoogle Scholar
  16. K. Popovici and A. Jerraya. Flexible and abstract communication and interconnect modeling for mpsoc. In Proceedings of the 2009 Asia and South Pacific Design Automation Conference (ASP-DAC), pages 143--148, Piscataway, NJ, USA, 2009. IEEE Press. Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. A. Singh, M. Shafique, A. Kumar, and J. Henkel. Mapping on multi/many-core systems: Survey of current and emerging trends. In 50th ACM / EDAC / IEEE Design Automation Conference (DAC), 2013. Google ScholarGoogle ScholarDigital LibraryDigital Library
  18. D. Wiklund and D. Liu. Socbus: switched network on chip for hard real time embedded systems. In Parallel and Distributed Processing Symposium, 2003. Proceedings. International, pages 8 pp.--, April 2003. Google ScholarGoogle ScholarDigital LibraryDigital Library

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  • Published in

    cover image ACM Other conferences
    RAPIDO '16: Proceedings of the 2016 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools
    January 2016
    41 pages
    ISBN:9781450340724
    DOI:10.1145/2852339

    Copyright © 2016 ACM

    Publication rights licensed to ACM. ACM acknowledges that this contribution was authored or co-authored by an employee, contractor or affiliate of a national government. As such, the Government retains a nonexclusive, royalty-free right to publish or reproduce this article, or to allow others to do so, for Government purposes only.

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    • Published: 18 January 2016

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