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Towards highly parallel event processing through reconfigurable hardware

Published:13 June 2011Publication History

ABSTRACT

We present fpga-ToPSS (Toronto Publish/Subscribe System), an efficient event processing platform to support high-frequency and low-latency event matching. fpga-ToPSS is built over reconfigurable hardware---FPGAs---to achieve line-rate processing by exploring various degrees of parallelism. Furthermore, each of our proposed FPGA-based designs is geared towards a unique application requirement, such as flexibility, adaptability, scalability, or pure performance, such that each solution is specifically optimized to attain a high level of parallelism. Therefore, each solution is formulated as a design trade-off between the degree of parallelism versus the desired application requirement. Moreover, our event processing engine supports Boolean expression matching with an expressive predicate language applicable to a wide range of applications including real-time data analysis, algorithmic trading, targeted advertisement, and (complex) event processing.

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                cover image ACM Conferences
                DaMoN '11: Proceedings of the Seventh International Workshop on Data Management on New Hardware
                June 2011
                58 pages
                ISBN:9781450306584
                DOI:10.1145/1995441

                Copyright © 2011 ACM

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                Publication History

                • Published: 13 June 2011

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