Innovative through-silicon-via formation approach for wafer-level packaging applications

To redistribute WL TSVs on wafers for the LED sub-mount application, a layout pattern with 9400 TSVs wafer⁻¹ was designed for WLP. Moreover, the specifications like the wafer thickness of 400 µm, TSV diameter of 150 µm and taper angle of the TSV sidewall between 85° and 90° are required. The bending strength of the silicon wafer is only around 250 MPa; hence, the 400 µm thick silicon wafer is necessary to prevent fracture of the silicon substrate in the subsequent packaging process. The TSV diameter in 3D ICs for achieving the highest volume capacity ratio is around 50 µm; however, in the LED sub-mount application, heat dissipation is of great concern. TSVs of larger diameter that contain holes filled with copper electroplating are beneficial for overcoming the problem of LED heat dissipation. Copper electroplating is a critical process after TSV formation. A taper angle between 85° and 90° is the best condition for rapid electroplating and metal coherence. The copper peels if metal coherence fails. In brief, the purpose of the designed pattern layout and specification of TSVs is to improve the performance and reliability of production.

The experiments were carried out by using a DPSS UV ns pulsed laser. The laser source used in this study was a commercially available Q-switched, DPSS industrial ns UV laser that delivers an average power of 14 W at 100 kHz with a 355 nm wavelength and 40 ns pulse width. To drill through a thick wafer efficiently, the laser beam was focused through a telecentric lens with a focal length of 100 mm to achieve a 25 µm spot size with a depth of focus of approximately 400 µm. A two-axis galvanometer was used to quickly position the laser beam from point to point with a scan field of 50 mm × 50 mm on the X–Y plane. Trepanning, a process in which a laser beam smaller than the target diameter is moved in a circular motion to cut out holes, was then performed with ns laser pulses to afford TSVs with the following desired specifications: well-shaped holes, a taper angle of 85°–90° and a diameter of 100 µm. The laser drilling parameters were optimized in advance by the technical engineers of Marketech International Corporation (MIC), Taiwan. The tested samples were p-type single-crystal silicon wafers polished on one side with (1 0 0) crystal orientation, a diameter of 200 mm (8''), and a thickness of 400 µm. A confocal microscope (CM) and scanning electron microscope (SEM) were used to study the characteristic features of the TSVs, their surfaces and changes in the surroundings of the laser-drilled TSVs. The specifications of the laser system, drilling materials, optimized processing parameters and target values in this study are summarized in table 1.

WCE of silicon with HF–HNO₃ mixtures is widely used in the semiconductor industry and in the production of solar cells [27, 28]. The etching mechanism has been systematically investigated in several studies [29–31], according to which the etching of silicon in HF/HNO₃ mixtures follows a chemical process with two basic reaction steps. In the first step, silicon is formally oxidized by HNO₃ (equation (1)). In the subsequent step, the formed SiO₂ is dissolved by HF (equation (2)). The overall reaction is written as (equation (3)):

$$\begin{equation} 3{\rm Si} + 4{\rm HNO}_3 \to 3{\rm SiO}_2 + 4{\rm NO} + 2{\rm H}_2 {\rm O,} \end{equation} \tag{ 1 }$$

$$\begin{equation} {\rm SiO}_2 + 6{\rm HF} \to {\rm H}_2 {\rm SiF}_6 + 2{\rm H}_2 {\rm O,} \end{equation} \tag{ 2 }$$

$$\begin{equation} 3{\rm Si} + 4{\rm HNO}_3 + 18{\rm HF} \to 3{\rm H}_2 {\rm SiF}_6 + 4{\rm NO} + 8{\rm H}_2 {\rm O}{\rm .} \end{equation} \tag{ 3 }$$

The advantages of the WCE process are its simplicity, low cost, high yield rate and high etching selectivity. The etchants for the isotropic etching of silicon materials are mostly mixtures of HF, HNO₃, H₂O, CH₃COOH and NH₄F. Each etchant, which will have a different etching rate depending on the particular combination of etchants, is characterized by a unique etching selectivity. As a result, various degrees of surface finish can be achieved.

In this study, WCE was employed to remove surface or sidewall damage due to laser drilling on wafers. The laser-drilled wafers were laid horizontally and etched for 40 s in a polypropylene tank with the polished surface facing upward, and the etchant was magnetically stirred at 300 rpm and 20 °C. Three aqueous chemical etchants—etchants A (HF, HNO₃ and H₂O), B (HF, HNO₃ and CH₃COOH), and C (HF, HNO₃ and NH₄F)—were investigated. The chemical etchants were optimized for the purposes of cleaning debris, removing recast layers and providing the optimal conditions of wafer surface and sidewall roughness. The results are described and discussed in the following sections.

As mentioned above, although fs pulsed lasers could produce well-shaped TSVs with excellent sidewall quality, their mass production is unfeasible because their power, stability, affordability and throughput are currently insufficient. In order to meet the requirements for mass production, namely high TSV throughput and low cost of ownership, the TSVs were fabricated by a DPSS UV ns pulsed laser. The wafer surface and TSV sidewall conditions after the laser drilling step depend on the laser parameters. However, because of certain physical limitations, the quality of the wafer surface and that of the TSV sidewall are poor. Figure 1(a) shows an optical photograph of a wafer with 9400 TSVs fabricated by UV ns laser pulses, and figure 1(b) shows that a heat-affected zone (HAZ), a recast layer and debris were formed around the TSVs by using the UV ns laser. Figures 2(a) and (b) show detailed SEM photographs of the full and surface cross-sectional views, respectively, of a TSV. The experimental results clearly show that TSV fabrication by a UV ns pulsed laser results in the formation of debris and a recast layer, and that this fabrication affords poor sidewall roughness around the TSV. Moreover, a large amount of debris accumulates and a recast layer of approximately 10–15 µm in thickness forms around the entrance of the drilled TSV during laser ablation. The entrance and exit diameters of the laser-drilled TSVs were approximately 100 and 70 µm, respectively. In contrast, the recast layer that formed around the entrance was approximately 130 µm in diameter. This recast layer must be removed by subsequent WCE to satisfy the requirements of high-quality WL TSVs.

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The chemical etchants used in this study were optimized to remove surface and sidewall damage caused by UV ns laser pulses. Figures 3(a)–(c) show the conditions of sidewalls etched with etchants A, B and C, respectively. The sidewall etched by etchant A is clearly smoother than those etched by etchants B and C because only etchant A can finely remove the recast layer. Thus, A is the optimum etchant to satisfy the target condition of smooth sidewalls. Moreover, an appropriate mixture ratio is crucial for TSV WCE, that is, the chemical mixture ratio and process parameters of etchant A must be optimized. The etchant solution A, which consists of a mixture of 49% HF, 70% HNO₃ and 100% H₂O (diluent), was optimized through the Taguchi robust design method. Subsequently, the optimized solution was used to map its WCE properties to remove the recast layer formed by UV ns laser pulses and provide high TSV quality, where the TSV roundness and lateral etching value were used as the quality targets for the Taguchi experiments. In optimizing WCE etchant A, the criterion for TSV roundness was 'nominal is best' and that for the lateral etching value was 'higher is better'. A TSV roundness with a specific target value of 1 and a larger lateral etching value are indications of better performance. After identifying the most influential parameters, the optimized mixture ratio of etchant A (49% HF, 70% HNO₃ and 100% H₂O) is 15:9:2. Figure 4(a) shows that although the recast layer and debris are removed, the TSV sidewall remains rough before optimizing the WCE etchant. In contrast, after optimization, a TSV with smooth sidewalls was obtained, without debris on the drilling surface or a recast layer around the hole (figure 4(b)).

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In this work, we developed a WCE process to eliminate the damage to the wafer surface and TSV sidewall induced by the UV ns laser pulses and thus to obtain superior surface quality. We predict that the proposed method will enable semiconductor manufacturers to use ns laser drilling for industrial WL TSV fabrication because they can achieve the desired sidewall quality and circular TSV shape by incorporating a WCE process suitable for mass production. This prediction is based on three characteristic features of the method. Firstly, isotropic WCE of silicon with HF–HNO₃ mixtures is a widely used process in the semiconductor manufacturing industry because it removes work damage and effectively reduces roughness. In TSV applications as well, we predict that TSV sidewall damage will be removed and smooth sidewalls obtained if the surface tension of the WCE etchant is sufficiently small. Secondly, H₂O can be used as a diluent to control the etching rate and selectivity of the WCE etchant. We predict that the debris and recast layer formed by UV ns laser pulses will be removed rapidly owing to the unique etching selectivity of WCE. Finally, if a TSV has already been created, the WCE process can simply modify it to a circular shape via an isotropic etching mechanism.

As is evident from the results shown in figures 5(a) and (b), the HAZ, recast layer and debris that formed around a fabricated WL TSV were effectively eliminated through the optimized WCE process. Figures 6(a) and (b) show detailed SEM photographs of full and surface cross-sectional views, respectively, of a TSV after WCE. An approximately 88° taper angle and scallop-free (less than 10 nm) sidewall were obtained without a recast layer after 40 s of etching in a HF:HNO₃:H₂O etchant. The entrance diameter of the TSV fabricated by the UV ns pulsed laser was approximately 100 µm on average. After WCE processing, this was extended to approximately 150 µm on average. We repeated the WCE experiments with identical or similar compositions (HF:HNO₃:H₂O = 15:9:2) and demonstrated that variations in the taper angle and TSV diameter were within 10%.

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In this way, we introduced a simplified process for achieving TSVs of excellent quality with a diameter near 150 µm and an 88° taper angle on a 400 µm thick wafer. However, WCE increases the diameter of the laser-drilled TSV; moreover, there is a physical limit to the aspect ratio by using a UV ns laser drilling technique. Therefore, TSVs with a diameter of less than 100 µm and a depth of 400 µm will be difficult to fabricate with the proposed TSV formation approach. This issue may severely limit its use in advanced TSV applications such as 3D IC and SIP technologies. In further studies, the use of laser drilling with the percussion method for TSV fabrication could be investigated to achieve a TSV diameter of less than 50 µm; that is how the TSVs with a diameter ranging from 50 to 100 µm can be found. In addition, if it becomes possible to use wafers with a thickness of less than 400 µm, the proposed approach may be able to achieve TSVs with a diameter ranging from 50 to 100 µm.

With respect to TSV sidewall quality, figure 7(a) shows 10 nm scallops on a sidewall fabricated by the Bosch DRIE process [32]. Figure 7(b) shows that the proposed TSV formation approach can indeed be used to achieve a scallop-free sidewall superior to that obtained by Bosch DRIE.

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Regarding TSV throughput, the laser drilling speed is 8.04 TSVs s^–1 on a 400 µm thick silicon wafer and the WCE process time is 40 s. According to published literature on Bosch DRIE, the sidewall roughness can typically be reduced to 10 nm with a maximum etching rate of approximately 4 µm min⁻¹ (i.e. 6000 s for an etching depth of 400 µm) [13–18]. This relationship between processing time and the number of TSVs on a single wafer is plotted in figure 8. Based on 400 µm deep TSV etching with 10 nm sidewall quality and a TSV diameter of 150 µm, the processing speed of the proposed approach is 370% faster than that of the Bosch DRIE process, which corresponds to the etching of 10 000 TSVs on a single wafer for WLP. That is, the proposed approach is more efficient than the Bosch DRIE process as long as the number of TSVs on a single wafer is less than 47 918.

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Experimental results demonstrate that the recast layer, debris and rough sidewalls formed by the DPSS UV ns pulsed laser are effectively eliminated by implementing the combined process approach. A summary of the novel approach is shown in figure 9. This process is successfully applied to fabricate TSV for WLP applications.

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Concerning the equipment costs of the proposed TSV formation approach, the DPSS UV laser used in this experiment is approximately US$ 500 000 [33]; the fabrication cost of the WCE tank is approximately US$ 100; and the process cost of WCE for one batch of experiments is approximately US$ 50. Clearly, the proposed approach has a prospective advantage in terms of the cost of process ownership over Bosch DRIE (normally above US$ 1500 000, e.g. for SPTS Bosch DRIE equipment with corresponding lithography equipment [34]). This satisfies the exact requirements for industrial production.

The proposed TSV formation approach is superior to Bosch DRIE owing to its advantages of better TSV sidewall quality, higher TSV throughput, and lower cost of ownership.