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Scaleable CMOS Current-Mode Preamplifier Design for an Optical Receiver

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Abstract

We have designed a process-insensitive preamplifierfor an optical receiver, fabricated it in several different minimumfeature sizes of standard digital CMOS, and demonstrated designscaleability of this analog integrated circuit design. The sameamplifier was fabricated in a 1.2 µm and two different0.8 µm processes through the MOSIS foundry [1].The amplifier uses a multi-stage, low-gain-per-stage approach.It has a total of 5 identical cascaded stages. Each stage isessentially a current mirror with a current gain of 3. Threeof these preamplifiers have been integrated with a GaAs Metal-Semiconductor-Metal (MSM) photodetector and one with anInGaAs MSM detector by using a thin-film epilayer device separationand bonding technology [2]. This quasi-monolithic front-end of anoptical receiver virtually eliminates the parasitics between thephotodetector and the silicon CMOS preamplifier. We have demonstratedspeed and power dissipation improvement as the minimum feature sizeof the transistors shrink.

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Lee, M., Vendier, O., Brooke, M.A. et al. Scaleable CMOS Current-Mode Preamplifier Design for an Optical Receiver. Analog Integrated Circuits and Signal Processing 12, 133–144 (1997). https://doi.org/10.1023/A:1008217109255

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