Design of zero bias power detectors towards power consumption optimization in 5G devices
Introduction
The 5G is the new generation of mobile network that provides impressive data rate, thanks to the large frequency bandwidth, ultra-low latency, and ten-times geographic coverage. The IoT sensors are supported by the 5G systems, those sensors will be located everywhere (car, home, industrial health monitoring, etc.) providing many applications and increasing machine-to-machine connectivity [1]. Huge number of IoT sensors will be installed, hence, it will not be possible to provide batteries for all of these sensors [2]. Moreover, working at high frequencies leads to higher losses in transmission lines and lower devices efficiencies, hence, higher power has to be provided in order to compensate these losses. Therefore, energy efficiency is an important issue to be considered in 5G systems [3]. In this context, increasing the battery life time is proposed by harvesting the wireless energy in IoT devices [4]. In addition, several solutions are proposed in order to reduce power consumption in power amplifiers [5,6]. The average power tracking (APT) technique is one of those solutions, where power detector is employed to track the slow (average) variations of the envelope signal in order modulate the biasing levels of power amplifiers. To take the full benefit of (APT) technique, the power consumption of the detector has to be minimum.
In this context, we present the design and characterization of four zero bias detectors (ZBDs), based on MOSFET transistors, integrated in the 55-nm SiGe BiCMOS technology from ST- Microelectronics. The working frequency bands are in the range (38–55) GHz allowing the detectors to cover several 5G bands [7]. Since the detectors presented in this work do not require any power source, they can be the optimum solution for the 5G applications, where high power efficiency is required (such as APT technique).
Section snippets
Design
The 55-nm BiCMOS technology provides three categories of low threshold NMOS transistors (named as GP, LP and HPA). The GP transistor stands for general purpose, it is considered as the standard NMOS transistor of the technology. The LP transistor stands for low power, it is used for low power and high frequency applications. The HPA transistor stands for high performance analog, it was developed for analog applications by exhibiting higher gain and linearity.
The objectives of this work are to:
Voltage sensitivity definition
When the input RF power is in the states (OFF) and (ON), we define the corresponding DC output voltages () and () respectively. For low level of RF power, the voltage difference () is proportional to the injected RF power (). The voltage sensitivity (response coefficient in V/W) of the detector can be defined by:
Measurement of the reflection coefficient
Fig. 3 shows the measured and simulated curves of the GP, LP, HPA and LP Stack detectors. These detectors are matched in the frequency bands (38–48),
Conclusion
The synthesis and characterization of four ZBDs were presented. Each detector is based on different category of MOSFET transistor, integrated in SiGe 55-nm BiCMOS technology from ST-Microelectronics. Compared to other recent works, the HPA detector exhibits a very good performance with very low NEP value and large dynamic range. It was also shown that the stack topology helps increasing the dynamic range. Since the HPA transistor exhibits better performance than the LP, realizing a detector
Author statement
Issa Alaji: Conceptualization, Methodology, Software, Writing – original draft. Walid Aouimeur: Writing – review & editing. Haitham Ghanem: Writing – review & editing. Etienne Okada: Investigation. Sylvie Lépilliet: Investigation. Daniel Gloria: Project administration. Guillaume Ducournau: Supervision. Christophe Gaquière: Supervision.
Declaration of competing interest
The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper.
Acknowledgments
This research work is carried in the framework of the 16ENG06 ADVENT project which is supported by the European Metrology Programme for Innovation and Research (EMPIR). The EMPIR initiative is co-funded by the European’s Horizon 2020 research and innovation programme and the EMPIR Participating States.
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