Ultra low power and high gain switched CMOS current reused mixer for wireless multi-standard applications
Introduction
According to the recent advances in CMOS transceivers, multi-standard idea is the key solution to figure out the dilemma between the rapid growth of communication standards and high level of integration needs of RF system architectures [1]. Besides, low power and low cost transceiver designs are highly recommended and encouraged by the market for an effective competitiveness. However, most of the building blocks in the RF section are known by their high power consumption and large silicon area. Therefore, sharing the hardware remains to be an important suggestion to reach low power and low cost purpose for such sections [2]. In this context, up and down conversions, which are mainly based on mixers as building blocks, are the two functions essentially used to perform the frequency translation in the transmission and receiving operation modes, respectively. In down conversion mode, the mixer of receiving path is always in post-position of low noise amplifier circuit. A shared mixer in this configuration is undoubtedly a challenging design to achieve frequency translation under multi-standard requirements including GSM (DCS1800, PCS1900), 3G (UMTS), Bluetooth and WLAN b/g.
As mixer topology, the double balanced configuration is more used then the single one for its benefit in terms of common mode unwanted signals cancellation such as a common mode noise. For such topologies, Gilbert cell is a conventional double balanced one that provides gain [3]. In general, a moderate gain could be necessary to reach front-end requirements when a differential LNA precedes the mixer. However, a high gain mixer performance is more appreciated to increase the whole front end gain. Besides, the high gain needs an appropriate biasing leading to high power consumption and low linearity performances. Therefore, mixer design is still challenging to make trade-off between those performances. For instance, lowering the supply voltage to reduce the power is challenging task due to stacked stages of Gilbert cell. In pseudo differential mixers, the stacked stages are reduced to three to operates at low supply voltage [4]. However, it is often combined with a bleeding technique for a high gain purpose leading to additional current consumption.
Switched transconductors represent a good alternative to the conventional Gilbert cell by employing LO driven inverters instead of commuting stages [5]. As inverters operate in linear mode, less headroom is needed even for three stacked stages. In [6], the same technique is reported using a current reuse configuration to achieve a high gain conversion. All transistors operate in weak inversion inducing some benefits on linearity as shown in Section 3.3. This mode of operation becomes more attractive for best trade off between gain and power consumption. However, the frequency response is poor compared with the strong inversion mode [7]. Obviously, the moderate inversion mode seems the best choice for the best gain and power dissipation compromise.
Moreover, some other techniques were reported to reduce power consumption in front-end circuits for wireless applications. For instance, a cross coupled mixer is presented in [8]. A cross coupled LNA combined with current reuse is also used in [9]. In [10], the transconductance of common gate LNA is boosted using cross coupled technique.
In this work, a multi-standard switched transconductance mixer is addressed to operate in range frequency of 1.8–2.4 GHz. Operating in moderate inversion mode, the proposed mixer is based on two cascaded stages. The first one consists of the cross coupled current reused capacitor providing a high voltage gain. The switching operation is performed in the second stage, also based on the current reuse providing an additional gain conversion.
This paper is organized as follows: the second section describes the employed current reused and gm boosted techniques. The mixer design is presented in Section 3. The simulation results and discussion are presented in Section 4.
Section snippets
Current reuse
The current reuse technique is widely used in amplifiers and mixers to improve the gain and to save the power consumption [11], [12], [13]. To increase the effective transconductance of the amplifier in Fig. 1a, the current reuse technique is simply implemented by stacking the NMOS and PMOS transistors as depicted in Fig. 1b. The DC voltage gain of this topology is given bywhere gmN, gmP represent the transconductances of active devices NMOS and PMOS respectively, while r
Proposed core mixer
Fig. 4 depicts the complete double balanced proposed mixer. In addition to the matching network, the proposed mixer is composed of two cascaded stages where the first one is based on a cross coupled capacitor amplifier in current reuse configuration, and the second stage is simply a switched transconductance. The biasing circuit is not shown for simplicity purpose.
Post layout simulation results and discussion
Fig. 11 shows the layout of the proposed mixer without pads. The layout occupies about 0.115 mm2 of silicon active area. The four capacitors of the first stage represent the fifth of the total area.
All of the analysis and preformed results of the proposed mixer are obtained by simulation using SpectreRF tool. Moreover, as the proposed mixer interacts with its external environment, additional off-chip input and output passive networks are designed and added as shown in Fig. 4.
The passive
Conclusion
The combination of cross coupled capacitors, current reuse, and switched transconductance techniques is successfully used to design a down conversion CMOS mixer. The proposed mixer is implemented in 0.18- CMOS technology in the range of frequency 1.8–2.4 GHz for wireless multi-standard applications. In terms of results, the mixer experiences a low power consumption under a low voltage by operating transistors devices in moderate inversion region. The proposed mixer achieves high gain
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