Pt/Al stacked metals gate MESFET

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Abstract

A new InP MESFET structure both with a gate structure of stacked metal and with a active channel of stacked layer is proposed. The gate metals are constituted by a double metal structure, Pt/Al. It improves the barrier height and reduces the reverse leakage current in the MFSFET. This is due to the formation of Al2O3, and becoming a Pt/Al/Al2O3/InP, metal-insulating-semiconductor structure in the gate region of the transistor. The conductive channel is constituted by a stack-layered structure, a n-InP layer and an i-InP layer. A transfer characteristics of excellent pitch off, and transconductance of 93 mS/mm is derived. It also shows a negative differential resistance effect on the MESFET. The illumination and temperature effect of the transistor are brought into discussed.

Introduction

InP is believed to be an attractive material for high frequency and high power electronic devices because it has high peak and saturation velocities of electrons, and high thermal conductivity [1]. Therefore, InP-based field-effect transistors (FETs) are potentially better than GaAs metal–semiconductor field-effect transistors (MESFETs). However, the direct fabrication of a good Schottky contacts on n-InP has not been possible because of the low Schotthy barrier height, approximately 0.3–0.4 eV [2]. This low Schottky barrier height should result large reverse leakage currents and limit the performance of the MESFETs.

In order to reduce such high gate leakage currents, many attempts have been developed. It has been proposed to place a dielectric, such as InPxOy, CdOx and phosphorus nitride film etc., between gate metal and InP channel [3], [4], [5], [6], [7], [8], [9], [10], [11], [12] to form an metal–insulator-semiconductor FETs (MISFETs). However, these MISFETs suffer from problem of drain current drift [6] owing to the existence of high density of interface states which continue to hinder the development of this technology. Another approach to obtain good InP MESFET characteristics is to perform surface treatment and passivation prior to the gate metal deposition [13], [14]. Surface passivation techniques involving the growth of thin native oxides by thermal or wet chemical oxidation have been reported to increase the barrier height, and an n-channel InP FET with stable high-performance gates has been demonstrated. Also, large band gap heterojunction AlInAs/InP FETs and GaInP/InP FETs [15], [16], [17] have been fabricated, where the gate metal is deposited upon the AlInAs or GaInP layer to achieve a high Schottky barrier. Also, a stable InP MESFET with a buried planar doped P++ layer that enhanced the Schottky contact has been fabricated [18]. In this paper, we present a new depletion mode InP MESFET with a double-metal gate structure, Pt/Al [19] and a stack-layered conductive channel. The dc electrical characteristics of the device was studied in detail in this work.

Section snippets

Experimental

The cross-sectional view of the double-metal gate, Pt/Al, InP MESFET is shown in Fig. 1. Fe-doped semi-insulating InP substrate was used in the experiments. The epitaxial layers of a undoped i-InP layer, a Si doped n-InP active layer and a n+-InP layer for ohmic contact were grown by metal–organic chemical vapor deposition system (MOCVD) in sequence. The thickness and doping concentration are 1000 Å and about 5–9 × 1015 cm−3 for the undoped i-InP layer, 2000 Å and 1 × 1017 cm−3 for n-InP layer and 500 Å

Barrier height and specific contact resistance

The I–V characteristics of the Pt/Al gate-to-source diodes were measured at room temperature and analyzed on the basis of the thermionic emission model. The electrical characteristic of the Pt/Al/n-InP diode had been discussed [19]. The application of the stacked metals, Pt/Al to the gate of MESFET was realized in the study. The diode structure exhibits a effective barrier height of 0.7 eV, with an ideality factor of 1.11. The reverse leakage current is 2.6 × 10−7 Å at −3 V as shown in Fig. 2. The

Conclusion

A new n-channel depletion-mode InP field-effect transistor with enhanced barrier height gates, by using Pt/Al double metal is implemented. The device shows characteristics with excellent pitch off, and transconductance of 93 mS/mm. The conductive channel is constituted by a stacked-layered structure, a n-InP layer and an i-InP layer. This results in a negative resistance effect on the MESFET. The device shows good stability with little drain current drift after bias testing.

Acknowledgment

This work was supported by the National Science Council of the Republic of China through the contract of NSC 98-2221-E-168-014.

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