A novel overlay process for imprint lithography using load release and alignment error pre-compensation method

Abstract

As a low-cost and high-efficiency alternative to conventional photolithography, imprint lithography has been paid serious attention for it can realize the pattern transfer easily and repeatedly. Even so, there is still a long way to go before this technique can be used to manufacture ICs since the layer-to-layer alignment is a main obstacle. In this paper, the pattern distortion and position shift induced by loading force and friction force are investigated and an optimized process is proposed to realize high precision overlay, in which an optimal loading force and a load release and an alignment error pre-compensation (LRAEPC) method are adopted. The optimal loading force is acquired by comparing the variety trends of the residual layer and position shift with the loading force. Using the optimal loading force, transferred patterns with proper resist thickness and the minimal distortion are achieved. In LRAEPC method, load release is used to correct the pattern distortion and to alleviate the position shift. To avoid subsequent position adjustment in the fluid after load release, the pre-compensation alignment is performed before the mold is in contact with the wafer. This process does not locate correct alignment position and there is an alignment compensation value determined by the statistical data of alignment position shift after load release. Using this pre-compensation alignment method, the correct alignment can be obtained after load release.

Introduction

Traditional photolithography techniques have reached their limits in resolution, and shorter wavelength light is needed for making sub-100-nm structures, which makes the system more complicated and expensive. With the increased demand for smaller and more densely ICs, much research has been concentrated on the next-generation lithography techniques in which critical dimensions can reach sub-100-nm scale easily. As a low-cost and high-efficiency alternative to conventional lithography, imprint lithography has been paid serious attention for it can realize the pattern transfer easily and repeatedly [1], [2], [3], [4].

Though it is easy to realize the pattern transfer for imprint lithography, there is still a long way to go before this technique can be used to the production of ICs since the layer-to-layer alignment is a main obstacle [5], [6], [7], [8], [9]. In fact, the measurement of alignment error for imprint lithography is not the only bottleneck, and the distortion induced by the contact of template with the wafer complicates the overlay process: firstly, the force used in the imprint process may introduce distortion, tilt, shift, etc.; secondly, the adjustment of alignment error in thin film fluid may bring about distortion of imprinted pattern because of the frictional force. How to conquer these problems is a practical challenge.

In this paper, a novel overlay process is proposed to solve these problems, in which an optimal loading force and an LRAEPC method are adopted. Rather than in pursuit of ultra-thin residual layer with a large force, we try to find an optimal loading force and with which transferred patterns with proper resist thickness and minimal distortion can be achieved. To reduce the influence of force on pattern further, load release is used to correct the pattern distortion and to alleviate the position shift. If the position shift cannot be eliminated absolutely by load release, the pre-compensation alignment is performed and the compensation value is determined by the statistical data of alignment position shift after load release. Using this method, subsequent adjustment in fluid can be avoided and the correct alignment can be obtained after load release.