Communications in Nonlinear Science and Numerical Simulation
Integrated circuit generating 3- and 5-scroll attractors
Highlights
► A multiscroll chaotic oscillator is fabricated with integrated circuit technology. ► The oscillator is based on a V–I comparator designed with FGMOS transistors. ► The advantage of the tested circuit is the elimination of external DC references. ► Experimental observation of 3- and 5-scroll attractors is provided. ► Experimental results are in good agreement with theoretical ones.
Introduction
Chaotic oscillators with piecewise-linear (PWL) nonlinearities have been extensively investigated due to the mathematical simplicity of the formulae involved. Moreover, some of them do have partial analytical solutions [1], [2], [3], [4], [5], [6], [7], [8], [9], [10], [11]. For instance [3] is a seminal paper on continuous time multi-scroll attractors, and it is a generalization of the Chua’s circuit. Other PWL-function based approaches are summarized in [5]. The majority of them have been experimentally verified by using discrete electronic components, whereas attention to the integration realizations has been less investigated [7], [8], [9].
An important issue in designing multi-scroll oscillators is the use of function sign (switching function) to generate the desired nonlinearities [5]. On the one hand, by grouping several shifted sign functions, a stair-like function is obtained. On the other hand, by summing a linear slope, a saw-tooth function is achieved.
Some multi-scroll chaotic designs are very complex electronic systems [6], whereas others are too simple for achieving large number of scrolls [7]. However, an important drawback of all those electronic realizations is that they need many external direct current (DC) signal references [8]. Therefore, the motivation of this work is to highlight the integrated circuit (IC) realization of a FGMOS-based multi-scroll oscillator recently introduced in [9]. Our proposed IC implementation has the capability to generate for the first time, 3- and 5-scroll attractors without using numerous external DC references. The experimental realization requires just two DC voltage sources for biasing the FGMOS voltage-to-current (V-to-I) cell. To demonstrate the robustness of our IC design, we present the corner analysis results working with IC technology of 0.5 m.
Section snippets
Multi-scroll system
The system described by (1) can be found in [10]. Since all the system coefficients are little integers, the authors showed its usefulness on integrated realizations with robust chaotic behavior to the parameter variations.where are constants and is the set of normalized variables respecting to (the product of time and the integrator gain). This system generates multi-scroll attractors by using saw-tooth PWL functions, as demonstrated in
FGMOS V-to-I comparator
The V-to-I comparator based on an FGMOS inverter and the principle of the weighted sum of voltages in a floating input gate is detailed in [9]. The V-to-I cell shown in Fig. 2, is used to generate nonlinear functions by switching an adjustable DC bias current. An important advantage compared with the FGMOS-based Chua’s chaotic oscillator introduced in [7], is the nonlinear function design, since those authors reported just 3-scroll experimental attractors, but their IC design required external
Integrated circuit design
There are many suitable options for the IC design of the linear part in (1). It can be designed by using different active devices like the ones given in [12]. In this work we use unity-gain cells (UGCs) due to their relatively compact implementation. The circuit diagram for implementing (1) is shown in Fig. 5. The integration operation is carried out by the current flowing trough external capacitors C, with gain , thus the dominant time-constant of the dynamical system is RC, with .
The
Experimental results
The multi-scroll chaotic oscillator was fabricated using ON semiconductor IC technology. The chip microphotography is shown in Fig. 8. The output signals and are shown in time in Fig. 9 for the 3- and 5-scroll behaviors. The attractor is observed in Fig. 10 for 3- and 5-scrolls. The dominant frequency was observed in to change according to the integration capacitors as .
The maximum dominant frequency was observed with parasitic capacitances over 10% of the used
Conclusion
This article showed the experimental observation of 3- and 5-scroll attractors, from the IC design of a multi-scroll chaotic oscillator based on a V-to-I comparator implemented with FGMOS transistors. The experimental results of the IC realization were in accordance with theoretical results. The robustness of the proposed IC design was demonstrated by performing an analysis on the process variations over the IC technology of .
An important advantage of the tested circuit, compared with
Acknowledgments
Authors acknowledge CONACyT for the financial support given trough project 131839-Y and the scholarship 204229; to the PROMEP project UPPUE-PTC-033 and to project TIC-2532 funded by Consejeria de Innovación, Ciencia y Empresa, Junta de Andalucia, Spain. Author Sánchez-López thanks the support of the JAE-Doc program of CSIC, co-funded by FSE.
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