Abstract
This paper describes reliability experiments on 1200 V SiC power n-MOSFETs manufactured by three different manufacturers utilizing two different mechanisms: accelerated thermal aging and bias temperature instability. Each of the devices was electrically tested for evaluating variation of pre- and post-stress I–V characteristics. Pre-stress evaluation of threshold voltage (Vth) for 25 cycles showed transient behavior and a saturation toward an average value. For thermal aging reliability test, devices were stressed at 120 °C for 200 h and 3.33% of the devices showed significant shift in threshold voltage (Vth). For bias temperature instability measurement, devices were stressed at 120 °C for 200 h and a bias voltage of 20 V was applied across the gate–source terminals. For 96.7% device, Vth demonstrated an increment with stressing time and a movement toward saturation.
Similar content being viewed by others
Avoid common mistakes on your manuscript.
1 Introduction
Wide bandgap (WBG) power switching devices promise significantly more efficient operation of power electronic switching converters at higher junction temperatures and at higher switching frequencies compared to silicon power devices [1]. Among the available commercial WBG power devices in the market today, SiC power MOSFETs rated at 1200 V have been used for applications in motor drives, electric vehicles and power supplies as a replacement for silicon power MOSFETs and silicon IGBTs. However, SiC power MOSFETs have reliability issues due to excessive gate oxide, interface state charge and residual defects in the epitaxial region [2]. For instance, gate MOS threshold voltage shifts (ΔVGS(th)) due to DC positive (+ 15 V, + 20 V) and DC negative gate bias (− 10 V, − 15 V) at 150 °C are well-known [3].
In recent reliability study on 1200 V SiC-MOSFETs, weaker short-circuit capabilities compared to Si IGBT power devices, and two most prevalent failure mechanisms caused by gate oxide breakdown and thermal runaway [4] were mentioned. Murakami et al. showed a positive shift in threshold voltage for SiC-MOSFETs during positive bias temperature instability test [5]. Hu et al. demonstrated that non-uniformities in the electrothermal characteristics of parallelly connected 1200 V SiC-MOSFETs reduce overall reliability compared to discrete device since power is not equally dissipated between the devices [6]. Liu et al. performed a systemic reliability study of bias temperature instability on 1200 V SiC-MOSFETs and observed a saturation of threshold voltage with the stressing time [7].
In this work, we have presented the reliability study of 1200 V SiC power MOSFETs from three different manufactures. Accelerated thermal aging and bias temperature instability procedures were utilized to perform the reliability study. A measurement setup was developed to test multiple power devices by accelerated bias temperature instability testing method. The gradual degradation of static properties [e.g., threshold voltage (Vth)] due to bias temperature instability testing was also measured. A total number of 60 devices were tested, and statistical data analysis was used to estimate the trends and spreads in key device parameters such as Vth.
2 Experimental details
In this study, a total number of 60 devices were tested from three different manufacturers (termed as A, B and C). The device specifications are summarized in Table 1.
The reliability study of the power devices that were performed here could be divided into two main categories:
-
1.
Accelerated life test by temperature acceleration.
-
2.
Bias temperature instability test.
Before and after stressing the devices, the devices were tested to measure static electrical characteristics using Agilent 1505A power semiconductor parameter analyzer. In this test, the gate–source voltage, Vgs, was varied from 0 to 20 V, at the same time drain–source voltage, Vds, was varied from 0 to 20 V (Vds = Vgs) and corresponding drain–source current, Ids, was measured. The Vth of each device was measured from Vgs–Ids graphs using linear approximation method. The variation of first derivative of the Vgs–Ids graph was also measured. Each I–V characterization was performed for five times, and average threshold voltage was reported. For one of the SiC power MOSFETs, the Vth voltage measurement was performed for 25 times to understand transient behavior of the measurements and distinguish them from stress-related variations.
During accelerated thermal aging test, a set of ten devices from each manufacturers (total 30) were stressed at a 120 °C for 200 h inside a muffle furnace. Each device was then tested for 100 h to identify the degradation of static behavior.
An experimental setup was built to perform bias temperature instability measurement for multiple power MOSFETs (10 at a time) at the same time as shown in Fig. 1. In this setup, temperature was set at 120 °C, and an Omega benchtop PID controller was used to maintain the desired temperature. At the same time, an EL302RT Triple Power Supply was used to apply a constant gate–source bias voltage, Vgs, of + 20 V across each devices simultaneously.
3 Results and discussion
The variation of Vth of a SiC power n-MOSFET before applying stress is shown in Fig. 2, and the I-V measurements were run for 25 times. Vth showed a transient behavior throughout the measurements, due to the uneven distribution of dopant atoms in the channel and oxide thickness throughout channel length [8]. It is a good indicator that a slight increment or decrement of Vth, before and after electrical or thermal stress, does not dictate any gate oxide degradation. However, repetitive cycling can help to erase the history of the device by resetting transient charges, and therefore provides a more accurate measure of irreversible failure.
Variation of Vth accumulated around 4.7–4.8 V range, while the average is not fixed. Ids is a function of Vth; Ids followed Lorentzian fluctuation, which was due to the presence of 1/f noise which reflected capture and emission of charge carriers by active traps [9]. An increase in the Vth (from 4.7 to 4.8 V range) reflected an increase in negative trap density (NMOS) on the channel near the source end. On the other hand, Ashraf et al. [10] mentioned that a decrease in the Vth (from 4.8 to 4.7 V range) reflected an increase in negative trap density (NMOS) on the channel near the drain end. This testing allows us to see movement of active traps along the channel during measurement. As observed here, the trap density and total number of impurities distribute evenly across the channel as Vth moves toward the average value.
Figure 3 demonstrates the Vgs–Id behavior of a device (device # 4 from manufacturer A) before and after accelerated thermal stress. It should be mentioned that this device showed the highest amount of variation in the Vth (~ 9.6%) after 100 h of thermal stress, while other 29 devices from manufacturers A, B and C did not show such significant variation even after 200 h of thermal stress at 120 °C. As mentioned earlier, for current fluctuation at the strong inversion region, the channel part closer to the source region plays an important role, which means that thermal stress significantly increases number of active trap centers near the source region.
Figure 4 shows the variation of dId/dVgs for the same device (device # 4 from A) with Vgs. It could be observed here that the first derivate of drain current fluctuates significantly at inversion region. The peak position of dId/dVgs dictates the value of Vth. Therefore, this fluctuation reflects the change of Vth due to accelerated thermal stress.
Out of 30 devices, only one device (3.33%) showed a significant variation of Vth after 100 h of thermal stress, while no other device showed such a high deviation even after 200 h of thermal stress. If this significant change (9.5%) of Vth is count as a failure, relatively higher rate of failures at the beginning dictates higher infant mortality of the device, which follows Weibull distribution. On the contrary, zero or lower rate of failure at 200 h dictates lower random failure happenings at the later stage of stress, which also follows Weibull distribution. However, more points and longer duration of stress are required to understand complete aging profile and Weibull distribution for the SiC power MOSFETs.
The variation of Vth, for the SiC power MOSFETs which were stressed during bias temperature instability measurements, is shown in Fig. 5. The measurements were performed immediately after the devices were removed from stress set-up. It was observed that with the stress time, the threshold voltage shifted gradually and it demonstrated a trend of saturation at higher stress time (except A12). The change in Vth reflects the activation of near-interfacial oxide traps in the channel region as mentioned in [3]. The positive change in Vth increases the ON-state resistance of the device and eventually decreases device efficiency. The negative change in Vth (device #A12) causes drain leakage current during OFF-state which eventually leads to device-failure [3]. Out of total 30 power devices tested, only one showed a negative change in Vth.
The trend line of Vth over stress time for devices from manufacturer B and manufacturer C is shown in Figs. 6 and 7. From Fig. 6, it was observed that Vth increased initially with the thermal and electrical stress, and eventually saturated toward an average Vth value with further stress.
From Fig. 7, it was observed that Vth increased with the stress time expect devices C2 and C6. For devices C2 and C6, Vth fluctuated and eventually moved toward a saturated value. Regardless of the fluctuations, for every devices Vth moved toward an average value.
The research is focus toward device operation under harsh environment. One of the key environmental stressors for harsh environment is neutron radiation. The reliability testing under neutron irradiation for 1200 V SiC MOSFET showed low failure rate (0.1 device failure per 1 billion hours) at sea-level radiation exposure operated at rated 1200 V. The failure rate increases exponentially with the operating voltage above the rated voltage [11].
4 Conclusion
1200 V SiC power n-MOSFETs from three different manufacturers were tested for reliability by accelerated thermal aging and bias temperature instability mechanisms. SiC power MOSFETs demonstrated very low failure rate during accelerated thermal aging and bias temperature instability testing which demonstrated their reliability for high-temperature operations.
References
Shenai K, Scott RS, Baliga BJ (1989) Optimum semiconductors for high-power electronics. IEEE Trans Electron Devices 36(9):1811–1823
Shenai K (2015) Future prospects of wide bandgap (WBG) semiconductor power switching devices. IEEE Trans Electron Devices 62(2):248–257
Lelis AJ, Green R, Habersat DB, El M (2015) Basic mechanisms of threshold-voltage instability and implications for reliability testing of SiC MOSFETs. IEEE Trans Electron Devices 62(2):316–323
Ceccarelli L et al (2017) A survey of SiC power MOSFETs short-circuit robustness and failure mode analysis. Microelectron Reliab 76:272–276
Eiichi M, Oda K, Takeshita T (2016) Special features of Fowler-Nordheim stress degradation of SiC-MOSFETs. Jpn J Appl Phys 55(4S):04ER14
Hu J et al (2016) The effect of electrothermal nonuniformities on parallel connected SiC power devices under unclamped and clamped inductive switching. IEEE Trans Power Electron 31(6):4526–4535
Liu Y, et al (2018) SiC MOSFET threshold-voltage instability under high temperature aging. In: 2018 19th international conference on electronic packaging technology (ICEPT)
Tang X, De VK, Meindl JD (1997) Intrinsic MOSFET parameter fluctuations due to random dopant placement. IEEE Trans VLSI Syst 5(4):369–376
Sikula J, Levinshtein M (2004) Advanced experimental methods for noise research on nanoscale electronic devices. Kluwer Academic Publishers, New York
Ashraf N, Vasileska D, Klimeck G (2010) Modeling fluctuations in the threshold voltage and ON-current and threshold voltage fluctuation due to random telegraph noise. In: Proceedings of the IEEE Nanotechnology. pp 782–785
Lichtenwalner et al (2018) Reliability of SiC power devices against cosmic ray neutron single-event burnout. Trans Tech Publ 7:559–562
Funding
This work was funded by Department of Energy—PowerAmerica (Grant PA100215CFP51). Part of this work is also supported by U S Department of Energy (DoE), Office of Science, Office of Basic Energy Sciences, under DoE contract number DE-AC02-06CH11357.
Author information
Authors and Affiliations
Corresponding author
Ethics declarations
Conflict of interest
The authors declare that they have no conflict of interest.
Additional information
Publisher's Note
Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.
Rights and permissions
About this article
Cite this article
Ahmed, M., Kucukgok, B., Yanguas-Gil, A. et al. Reliability experimentation of 1200 V SiC power n-MOSFETs by accelerated thermal aging and bias temperature instability. SN Appl. Sci. 1, 733 (2019). https://doi.org/10.1007/s42452-019-0783-y
Received:
Accepted:
Published:
DOI: https://doi.org/10.1007/s42452-019-0783-y