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Advanced Low Power High Speed Nonlinear Signal Processing: An Analog VLSI Example.

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Abstract

Despite the progress made in digital signal processing during the last decades, the constraints imposed by high data rate communications are becoming ever more stringent. Moreover mobile communications raised the importance of power consumption for sophisticated algorithms, such as channel equalization or decoding. The strong link existing between computational speed and power consumption suggests an investigation of signal processing with energy efficiency as a prominent design choice. In this work we revisit the topic of signal processing with analog circuits and its potential to increase the energy efficiency. Channel equalization is chosen as an application of nonlinear signal processing, and a vector equalizer based on a recurrent neural network structure is taken as an example to demonstrate what can be achieved with state of the art in VLSI design. We provide an analysis of the equalizer, including the analog circuit design, system-level simulations, and comparisons with the theoretical algorithm. First measurements of our analog VLSI circuit confirm the possibility to achieve an energy requirement of a few pJ/bit, which is an improvement factor of three to four orders of magnitude compared with today’s most energy efficient digital circuits.

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Notes

  1. Microprocessors included in the comparison [Name, declared peak performance, TDP]: (1) Intel i7-3930k, 153 GFLOPS, 130 W; (2) Intel i7-3840QM, 89.6 GFLOPS, 45 W; (3) Intel i5-3570, 108.8 GFLOPS, 77 W; (4) Intel i5-3610ME, 43 GFLOPS, 35 W; (5) Intel i3-3229Y, 22.4 GFLOPS, 13 W.

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Acknowledgments

Financial support by the German research foundation DFG (Deutsche Forschungsgemeinschaft) is gratefully acknowledged. A note of thanks goes also to IHP GmbH for the Si/SiGe foundry processes needed to realize the circuit.

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Correspondence to Giuseppe Oliveri.

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Oliveri, G., Mostafa, M., Teich, W.G. et al. Advanced Low Power High Speed Nonlinear Signal Processing: An Analog VLSI Example.. J Sign Process Syst 89, 163–180 (2017). https://doi.org/10.1007/s11265-016-1171-0

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