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Sleep-mode ready, area efficient capacitor-free low-dropout regulator with input current-differencing

  • Mixed Signal Letter
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Abstract

This paper proposes an input current-differencing technique in designing a capacitor-free low-dropout regulator to simultaneously achieve sleep-mode efficiency and silicon real estate saving. With no minimum output current required to be stable, the regulator could greatly improve SoC efficiency during standby, which is extremely attractive for battery powered applications. Designed in TSMC 0.18-μm CMOS technology, it regulates 1.8–1.2 V supply down to 1 V with 100 mA maximum output current and can drive up to 100 pF of load parasitic capacitance. Compared with prior arts with the same sleep-mode compatibility and similar output current range, it reduces the on-chip compensation capacitance from 21 to 4.5 pF.

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Acknowledgments

The authors would like to thank Texas Instruments (TI) for partially funding this research.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, The Ohio State University, 2015 Neil Avenue, Columbus, OH, 43210, USA

    John Hu, Wei Liu & Mohammed Ismail

Authors
  1. John Hu
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  2. Wei Liu
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  3. Mohammed Ismail
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Correspondence to John Hu.

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Hu, J., Liu, W. & Ismail, M. Sleep-mode ready, area efficient capacitor-free low-dropout regulator with input current-differencing. Analog Integr Circ Sig Process 63, 107–112 (2010). https://doi.org/10.1007/s10470-009-9441-4

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  • DOI: https://doi.org/10.1007/s10470-009-9441-4

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