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Random Process Variation in Deep-Submicron CMOS

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Stochastic Process Variation in Deep-Submicron CMOS

Part of the book series: Springer Series in Advanced Microelectronics ((MICROELECTR.,volume 48))

Abstract

One of the most notable features of nanometer scale CMOS technology is the increasing magnitude of variability of the key parameters affecting performance of integrated circuits [1]. Although scaling made controlling extrinsic variability more complex, nonetheless, the most profound reason for the future increase in parameter variability is that the technology is approaching the regime of fundamental randomness in the behavior of silicon structures where device operation must be described as a stochastic process. Electric noise due to the trapping and de-trapping of electrons in lattice defects may result in large current fluctuations, and those may be different for each device within a circuit.

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    Amir Zjajo

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Zjajo, A. (2014). Random Process Variation in Deep-Submicron CMOS . In: Stochastic Process Variation in Deep-Submicron CMOS. Springer Series in Advanced Microelectronics, vol 48. Springer, Dordrecht. https://doi.org/10.1007/978-94-007-7781-1_2

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