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Inherent Limitations of Hybrid Transactional Memory

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Book cover Distributed Computing (DISC 2015)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 9363))

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Abstract

Several Hybrid Transactional Memory (HyTM) schemes have recently been proposed to complement the fast, but best-effort nature of Hardware Transactional Memory (HTM) with a slow, reliable software backup. However, the costs of providing concurrency between hardware and software transactions in HyTM are still not well understood.

In this paper, we propose a general model for HyTM implementations, which captures the ability of hardware transactions to buffer memory accesses. The model allows us to formally quantify and analyze the amount of overhead (instrumentation) caused by the potential presence of software transactions. We prove that (1) it is impossible to build a strictly serializable HyTM implementation that has both uninstrumented reads and writes, even for very weak progress guarantees, and (2) the instrumentation cost incurred by a hardware transaction in any progressive opaque HyTM is linear in the size of the transaction’s data set. We further describe two implementations which exhibit optimal instrumentation costs for two different progress conditions. In sum, this paper proposes the first formal HyTM model and captures for the first time the trade-off between the degree of hardware-software TM concurrency and the amount of instrumentation overhead.

P. Kuznetsov—The author is supported by the Agence Nationale de la Recherche, ANR-14-CE35-0010-01, project DISCMAT.

N. Shavit—Support is gratefully acknowledged from the National Science Foundation under grants CCF-1217921, CCF-1301926, and IIS-1447786, the Department of Energy under grant ER26116/DE-SC0008923, and the Oracle and Intel corporations.

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Author information

Authors and Affiliations

  1. Microsoft Research, Cambridge, UK

    Dan Alistarh

  2. Massachuseets University of Technology, Cambridge, USA

    Justin Kopinsky & Nir Shavit

  3. Télécom ParisTech, Paris, France

    Petr Kuznetsov

  4. TU Berlin, Berlin, Germany

    Srivatsan Ravi

  5. Tel Aviv University, Tel Aviv, Israel

    Nir Shavit

Authors
  1. Dan Alistarh
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  2. Justin Kopinsky
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  3. Petr Kuznetsov
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  4. Srivatsan Ravi
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  5. Nir Shavit
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Corresponding author

Correspondence to Srivatsan Ravi .

Editor information

Editors and Affiliations

  1. Technion, Haifa, Israel

    Yoram Moses

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Alistarh, D., Kopinsky, J., Kuznetsov, P., Ravi, S., Shavit, N. (2015). Inherent Limitations of Hybrid Transactional Memory. In: Moses, Y. (eds) Distributed Computing. DISC 2015. Lecture Notes in Computer Science(), vol 9363. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-48653-5_13

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  • DOI: https://doi.org/10.1007/978-3-662-48653-5_13

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-662-48652-8

  • Online ISBN: 978-3-662-48653-5

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