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Improving Reliability of Multi-/Many-Core Processors by Using NMR-MPar Approach

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Radiation Effects on Integrated Circuits and Systems for Space Applications

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Abstract

The new trend in computing systems is providing solutions by using multicore and many-core processors. COTS processors are preferred because they offer a high performance with low-power consumption within an affordable price. Lately these devices have been used in High Performance Computing systems due to their massive parallelism and low-power budget. For the last decade, industrial and academic partners have worked together to overcome with dependability issues to extend their usage in embedded systems. Despite of multiple proposals for improving the multi-core reliability, their use is not yet validated for critical tasks. This chapter describes a new fault-tolerance approach called NMR-MPar which is based on N-Modular Redundancy and M-Partitions to improve the reliability of applications running on these devices. The evaluation of the effectiveness of the NMR-MPar approach on two complementary benchmark applications running on the 28 nm CMOS MPPA-256 many-core processor has shown the possibility to consider this approach for mixed-criticality systems. Finally, this chapter analyses the overhead of the approach in terms of power consumption and energy.

Based on “NMR-MPar: A Fault-Tolerance Approach for Multi-Core and Many-Core Processors,” by V. Vargas, P. Ramos, Jean-Francois Mehaut, and Raoul Velazco which published in Appl. Sci., 8(3), 465, 2018.

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Notes

  1. 1.

    In this context, the Calcul Parallele` pour Applications Critiques en Temps et Surete´ (CAPACITES) project gathers French academic and industrial partners for building a many-core processor platform for critical-embedded applications including avionics.

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Acknowledgments

This work was supported in part by the Universidad de las Fuerzas Armadas ESPE and by the Secretaria de Educación Superior, Ciencia, Tecnología e Innovación del Ecuador (SENESCYT) through the grant PIC-2017-EXT-004 and STIC—AmSud (Science et Tech-nologie de l’Information et de la Communication en Amrique du Sud)—Energy-aware Scheduling and Fault Tolerance Techniques for the Exascale Era (EnergySFE) Project PIC-16-ESPE-STIC-001, and by the French authorities through the “Investissements d’Avenir” program (CAPACITES project). The authors thank Stephané Gailhard from the Societé Kalray for his valuable contribution to solving the MPPA programming issues.

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Authors and Affiliations

  1. Universidad de las Fuerzas Armadas ESPE, Sangolqui, Ecuador

    Vanessa Vargas & Pablo Ramos

  2. Université de Grenoble Alpes, Saint Martin d’Heres, France

    Jean-Francois Méhaut

  3. Centre Nationale Recherche Scientifique (CNRS), Grenoble, France

    Raoul Velazco

Authors
  1. Vanessa Vargas
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  2. Pablo Ramos
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  3. Jean-Francois Méhaut
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  4. Raoul Velazco
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Corresponding author

Correspondence to Vanessa Vargas .

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Editors and Affiliations

  1. Centre Nationale Recherche Scientifique (CNRS), Grenoble, France

    Raoul Velazco

  2. United States Naval Research Laboratory, Washington, DC, USA

    Dale McMorrow

  3. Spectrum Aerospace Group, Munich, Germany

    Jaime Estela

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Vargas, V., Ramos, P., Méhaut, JF., Velazco, R. (2019). Improving Reliability of Multi-/Many-Core Processors by Using NMR-MPar Approach. In: Velazco, R., McMorrow, D., Estela, J. (eds) Radiation Effects on Integrated Circuits and Systems for Space Applications. Springer, Cham. https://doi.org/10.1007/978-3-030-04660-6_8

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  • DOI: https://doi.org/10.1007/978-3-030-04660-6_8

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