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Thermal-Aware 3D Floorplan

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Three Dimensional Integrated Circuit Design

Part of the book series: Integrated Circuits and Systems ((ICIR))

Abstract

Three-dimensional integration makes floorplanning a much more difficult problem because the multiple device layers dramatically enlarge the solution space and the increased power density accentuates the thermal problem. This chapter introduces the algorithms for 3D floorplanning with both 2D blocks and 3D blocks. In addition to stochastic optimizations based on various representations that are briefly introduced, the analytical approach is also introduced. The effects of various 3D floorplanning techniques on wirelength, area, and temperature are demonstrated by experimental results.

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Acknowledgments

The authors would like to acknowledge the support from the Gigascale Silicon Research Center, IBM under a DARPA subcontract, the National Science Foundation under CCF-0430077 and CCF-0528583, the National Science Foundation of China under 60606007, 60720106003, 60728205, the Tsinghua Basic Research Fund under JC20070021, and the Tsinghua National Laboratory for Information Science and Technology (TNList) Cross-discipline Foundation under 042003011; this support led to a number of results reported in this chapter.

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Authors and Affiliations

  1. Department of Computer Science, University of California, 90095, Los Angeles, CA, USA

    Jason Cong

  2. Department of Computer Science and Technology, Tsinghua University, 100084, Beijing, P.R.China

    Yuchun Ma

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  1. Jason Cong
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Correspondence to Jason Cong .

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Editors and Affiliations

  1. Dept. Computer Science & Engineering, Pennsylvania State University, University Park, 16802, U.S.A.

    Yuan Xie

  2. Dept. Computer Science, University of California, Los Angeles, Boelter Hall 4731, Los Angeles, 90095-1596, U.S.A.

    Jason Cong

  3. Institute of Technology, University of Minnesota, Union St. SE., 200, Minneapolis, 55455, U.S.A.

    Sachin Sapatnekar

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Cong, J., Ma, Y. (2010). Thermal-Aware 3D Floorplan. In: Xie, Y., Cong, J., Sapatnekar, S. (eds) Three Dimensional Integrated Circuit Design. Integrated Circuits and Systems. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-0784-4_4

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  • DOI: https://doi.org/10.1007/978-1-4419-0784-4_4

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  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4419-0783-7

  • Online ISBN: 978-1-4419-0784-4

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