Theoretical and Practical Aspects of SPIN Model Checking

1. Front Matter

   Pages I-X

   PDF

2. Part I:Selection of Papers Presented at 5thSPIN99

   1. Keynote Address

      1. Integrated Formal Verification: Using Model Checking with Automated Abstraction, Invariant Generation, and Theorem Proving

         • John Rushby

         Pages 1-11

   2. Theory

      1. Runtime Efficient State Compaction in Spin

         • J Geldenhuys, P J A de Villiers, John Rushby

         Pages 12-21

      2. Distributed-Memory Model Checking with SPIN

         • Flavio Lerda, Riccardo Sisto

         Pages 22-39

      3. Partial Order Reduction in Presence of Rendez-vous Communications with Unless Constructs and Weak Fairness

         • Dragan Bošnački

         Pages 40-56

      4. Divide, Abstract, and Model-Check

         • Karsten Stahl, Kai Baukus, Yassine Lakhnech, Martin Stefen

         Pages 57-76

3. Part II: Papers Presented at 6thSPIN99

   1. Keynote Address

      1. Formal Methods Adoption: What’s Working, What’s Not!

         • Dan Craigen

         Pages 77-91

   2. Methodology

      1. Model Checking for Managers

         • Wil Janssen, Radu Mateescu, Sjouke Mauw, Peter Fennema, Petra van der Stappen

         Pages 92-107

      2. Xspin/Project - Integrated Validation Management for Xspin

         • Theo C. Ruys

         Pages 108-119

   3. Applications I

      1. Analyzing Mode Confusion via Model Checking

         • Gerald Lüttgen, Victor Carreño

         Pages 120-135

      2. Detecting Feature Interactions in the Terrestrial Trunked Radio (TETRA) Network Using Promela and Xspin

         • Carl B. Adekunle, Steve Schneider

         Pages 136-151

      3. Java PathFinder A Translator from Java to Promela

         • Klaus Havelund

         Pages 152-152

      4. VIP: A Visual Interface for Promela

         • Moataz Kamel, Stefan Leue

         Pages 153-153

   4. Specification and Validation

      1. Events in Property Patterns

         • Marsha Chechik, Dimitrie O. Păun

         Pages 154-167

      2. Assume-Guarantee Model Checking of Software: A Comparative Case Study

         • Corina S. Păsăreanu, Matthew B. Dwyer, Michael Huth

         Pages 168-183

      3. A Framework for Automatic Construction of Abstract Promela Models

         • Maria-del-Mar Gallardo, Pedro Merino

         Pages 184-199

   5. Applications

      1. Model Checking Operator Procedures

         • Wenhui Zhang

         Pages 200-215

      2. Applying Model Checking in Java Verification

         • Klaus Havelund, Jens Ulrik Skakkebæk

         Pages 216-231

   6. Extensions

      1. The Engineering of a Model Checker: the Gnu i-Protocol Case Study Revisited.

         • Gerard J. Holzmann

         Pages 232-244

      2. Embedding a Dialect of SDL in PROMELA

         • Heikki Tuominen

         Pages 245-260

Increasing the designer’s con dence that a piece of software or hardwareis c- pliant with its speci cation has become a key objective in the design process for software and hardware systems. Many approaches to reaching this goal have been developed, including rigorous speci cation, formal veri cation, automated validation, and testing. Finite-state model checking, as it is supported by the explicit-state model checkerSPIN,is enjoying a constantly increasingpopularity in automated property validation of concurrent, message based systems. SPIN has been in large parts implemented and is being maintained by Gerard Ho- mann, and is freely available via ftp fromnetlib.bell-labs.comor from URL http://cm.bell-labs.com/cm/cs/what/spin/Man/README.html. The beauty of nite-state model checking lies in the possibility of building \push-button" validation tools. When the state space is nite, the state-space traversal will eventually terminate with a de nite verdict on the property that is being validated. Equally helpful is the fact that in case the property is inv- idated the model checker will return a counterexample, a feature that greatly facilitates fault identi cation. On the downside, the time it takes to obtain a verdict may be very long if the state space is large and the type of properties that can be validated is restricted to a logic of rather limited expressiveness.

• Java
• Sage
• formal method
• formal verification
• model
• model checking
• verification

• Department of Electrical Engineering and Department of Mathematics and Computer Science, Eindhoven University of Technology, MB Eindhoven, The Netherlands

  Dennis Dams

• Intel Microprocessor Products Group, Strategic CAD Laboratories, Hillsboro, USA

  Rob Gerth

• Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, Canada

  Stefan Leue

• C.N.R.-Ist., Pisa, Italy

  Mieke Massink

Policies and ethics