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A Prolog processor based on a pattern matching memory device

  • Session 2a: Implementations And Architectures
  • Conference paper
  • First Online:
Third International Conference on Logic Programming (ICLP 1986)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 225))

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Abstract

A Prolog processing system using a parallel pattern matching component is outlined. The component, called a Pattern Addressable Memory (PAM), is used to store the clause heads from a Prolog database, and match them against an input goal/subgoal. It is shown that using this device has advantages not only for clause selection, but also for the unification function itself. Such a system, it is argued, demonstrates superior performance compared to serial approaches.

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References

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Author information

Authors and Affiliations

  1. Schlumberger Palo Alto Research, Computer Aided Systems Laboratory, 3340 Hillview Ave., 94304, Palo Alto, CA

    Ian Robinson

Authors
  1. Ian Robinson
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Editor information

Ehud Shapiro

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© 1986 Springer-Verlag Berlin Heidelberg

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Robinson, I. (1986). A Prolog processor based on a pattern matching memory device. In: Shapiro, E. (eds) Third International Conference on Logic Programming. ICLP 1986. Lecture Notes in Computer Science, vol 225. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-16492-8_73

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  • DOI: https://doi.org/10.1007/3-540-16492-8_73

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-16492-0

  • Online ISBN: 978-3-540-39831-8

  • eBook Packages: Springer Book Archive

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