David Cuesta
ABSTRACT
Thermal effects are becoming increasingly important in today's sub-micron technologies. Thermal issues affect the performance, the reliability and the cooling costs of integrated systems. High peak temperatures are of major concern in modern 3D designs, where the stacking of multiple layers leads to higher power densities. Therefore, the integration of the thermal-aware design during the initial phases of the design can reduce the cost and the time-to-market of the resulting product. An efficient floorplanning in terms of thermal effects will reduce the appearance of critical hotspots and will spread heat across the chip area.
This paper analyzes the thermal distribution of 3D multicore architectures and provides a motivation for the need of a thermal-aware floorplanner for such architectures.
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Index Terms
- Thermal-aware floorplanning exploration for 3D multi-core architectures
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