Elsevier

Microelectronics Journal

Volume 83, January 2019, Pages 155-167
Microelectronics Journal

Design and application examples of CMOS fractional-order differentiators and integrators

https://doi.org/10.1016/j.mejo.2018.11.013Get rights and content

Abstract

Reduced complexity CMOS fractional-order differentiator and integrator building blocks are introduced in this work, based on 2nd-order integer-order transfer function approximations. These blocks are then used for implementing fractional-order filters as well as a Leaky-Integrate-and-Fire Mihalas-Niebur neuron model. Cascading 1st and 2nd-order blocks to obtain 5th-order integer-order transfer functions, improved bandwidth of approximation accuracy is achieved. Furthermore, the realization of fractional-order capacitor and inductor emulators is demonstrated.

Introduction

Fractional-order calculus is utilized in a variety of interdisciplinary applications [[1], [2], [3]], and towards this goal differentiation and integration stages are essential building blocks for performing the required signal processing. Various applications of fractional-order circuits in filter design [[4], [5], [6], [7], [8], [9], [10], [11], [12]], oscillator design [13,14], biological tissue modeling [[15], [16], [17], [18], [19], [20], [21], [22], [23]] as well as in automatic control [24,25] have been introduced in the literature. Fractional-order differentiators and integrators offer attractive characteristics compared to their integer-order counterparts, including scaling of the time-constants as well as phase difference between input and output which is ±απ∕2, with (0 < α < 1). The straightforward way for implementing such blocks is the substitution of capacitors in the conventional (i.e. integer-order) structures by fractional-order capacitors, known also as Constant Phase Elements (CPEs). A fractional-order capacitor is characterized by two parameters Ca,α, where Cα is the pseudo-capacitance expressed in units of Farad∕ sec1−α and 0 < α < 1 is the (fractional) order [26]. The impedance of a CPE is described in the s-domain by (1), where the relation between pseudo-capacitance and the conventional capacitance (in Farad), can be expressed as in (2)Z(s)=1Cαsα=1Cαωαcosαπ2+jsinαπ2,C=Cαω1α.This direct substitution technique is not easily realizable, due to the absence of commercially available fractional-order elements despite the growing effort and clear progress towards this goal [[27], [28], [29], [30]]. Thus, appropriately configured RC networks [31] have been employed to approximate the behavior of fractional-order capacitors. However, this technique's major drawback is that the complete RC network must be re-designed in order to change the approximated fractional capacitor's pseudo-capacitance and/or its order. An alternative technique is the utilization of integer-order transfer functions, derived through an appropriate method, for approximating the integro-differential Laplacian operator (sα) [19]. Discrete IC component implementations of fractional-order differentiators/integrators, where Operational Amplifiers (op-amps) or Current Feedback Operational Amplifiers (CFOAs) were used, have been presented in the literature, but they suffer from the absence of electronic tuning of their characteristics [32]. Only integrated CMOS implementations [33,34] offer such feature, as a result of employing, for example, the current-controlled small-signal transconductance parameter (gm) of Operational Transconductance Amplifiers (OTAs) or Current-Mirrors (CMs). However, the CMOS implementations already reported in the literature suffer from increased complexity which limits the possibility of increasing the order of the underlying integer-order approximation.

In order to overcome this obstacle, CMOS topologies which perform 2nd- and 5th-order approximations of fractional-order differentiators/integrators while offering significantly reduced circuit complexity, are presented in this paper. While some preliminary results have been reported in Ref. [35], here we develop a new systematic method for performing higher-order approximations of fractional-order differentiators/integrators and, in addition, validate the proposed design in application examples using both 2nd-order and 5th-order approximations.

The paper is organized as follows: in Section 2, the topology of fractional-order differentiator/integrator, derived by implementing a 2nd-order transfer function that approximates the Laplacian operator, is demonstrated. Designs of fractional-order lowpass/highpass filters and the Leaky-Integrate-and-Fire Mihalas-Niebur neuron model are presented in Section 3. In Section 4, the implementation of a 5th-order transfer function that approximates the fractional Laplacian operator is demonstrated. As an application example, the realization of emulators of fractional-order capacitors and inductors is presented in Section 4.1. The behavior of all the proposed designs is verified in Cadence using the Design Kit provided by the Austria Mikro Systeme (AMS) 0.35 μm CMOS process.

Section snippets

Realization of a fractional-order differentiator/integrator using a 2nd-order approximation

The transfer function of a fractional-order differentiator/integrator is given by:H(s)=τsrwhere r = α (0 < α < 1) is the order of the differentiator, while for the integrator r = −α (0 < α < 1). Also, the unity-gain frequency (ωo) of the stage is defined as ωo = 1∕τ, where (τ) is a time-constant. Using (3), the magnitude and phase frequency responses are given by the expressions |H(ω)|=ω/ωor and ∠H(ω) = πr∕2, respectively [36].

The transfer function in (3) can be approximated, around the

Filter design example

The Functional Block Diagram (FBD) of a fractional-order low/highpass filter, using a differentiator/integrator with unity gain frequency ωo = 1∕τ as active core, is demonstrated in Fig. 2. In the case of r = α, then the highpass filter function given by (11) is implemented, while when r = −α the transfer function of the realized lowpass filter is given by (12). The desirable inverted output is also available, using an extra current-mirror at the output, as depicted in the full circuitry shown

Fractional-order differentiator/integrator using a 5th-order approximation

Although the 2nd-order CFE approximation offers circuit simplicity, its accuracy for an error in phase less than 10%, is restricted to the range [fo∕10, 10fo], where fo is the center frequency of the CFE approximation. In order to extend this frequency range, a higher-order approximation must be utilized. The integer-order transfer function in the case of a 5th-order CFE approximation is given by(τs)rA5s5+A4s4+A3s3+A2s2+A1s+AoB5s5+B4s4+B3s3+B2s2+B1s+Bo.The values of coefficients Ai (i = 0, 1,

Conclusions

Application design examples including the realization of fractional-order filters, a fractional-order neuron model and emulators of fractional-order capacitor/inductor have been demonstrated and verified in this work. These applications rely on optimized and reduced complexity fractional-order differentiator/integrator stages that are also electronically tunable. Compared to already published CMOS structures, there is a significant reduction in the number of transistor employed which

Acknowledgment

This work is supported by the General Secretariat for Research and Technology (GSRT) and the Hellenic Foundation for Research and Innovation (HFRI).

This article is based upon work from COST Action CA15225, a network supported by COST (European Cooperation in Science and Technology).

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