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SDL/Virtual Prototype Co-design for Rapid Architectural Exploration of a Mobile Phone Platform

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Part of the book series: Lecture Notes in Computer Science ((LNCCN,volume 5719))

Abstract

In this paper we present a new hardware/software co-design methodology for embedded systems, where software components written in Specification and Description Language (SDL) execute on a soft-model of a hardware platform, a so called Virtual Prototype (VP). The proposed approach enables fast exploration of different hardware and software design options at high level of abstraction in order to make early system design decisions. We prove our approach by considering the Long Term Evolution (LTE) communication stack as a use case for the architectural exploration of our mobile terminal. The open source L4/Fiasco microkernel is deployed as a Real-Time OS to run the modem application represented by the LTE SDL-modelled protocol stack. We profile and analyze the system performance by measuring average and maximum packet processing times under various hardware and software conditions. Thereby, we are able to rapidly obtain an efficient design point that provides 80 % packet processing speedup against other unoptimized implementations while meeting the required timing constraints and maintaining a good balance between area and power consumption.

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References

  1. Grötker, T., Liao, S., Martin, G., Swan, S.: System Design with SystemC. Kluwer Academic Publishers, Boston (2002)

    Google Scholar 

  2. Thiele, L., Wandeler, E.: Performance Analysis of Distributed Embedded Systems. In: Zurawski, R. (ed.) Embedded Systems Handbook, CRC Press, Boca Raton (2005)

    Google Scholar 

  3. Ernst, R., Henkel, J., Benner, T.: Hardware-Software Cosynthesis for Microcontrollers. IEEE Design & Test of Computers 10(4), 64–75 (1993)

    Article  Google Scholar 

  4. Thomas, D.E., Adams, J.K., Schmit, H.: A Model and Methodology for Hardware-Software Codesign. IEEE Design & Test of Computers 10(3), 6–15 (1993)

    Article  Google Scholar 

  5. Chiodo, M., Giusto, P., Jurecska, A., Hsieh, H.C., Vincentelli, A.S., Lavagno, L.: Hardware-Software Codesign of Embedded Systems. IEEE Micro. 14(4), 26–36 (1994)

    Article  Google Scholar 

  6. Gajski, D.D., Vahid, F.: Specification and Design of Embedded Hardware-Software Systems. IEEE Design & Test of Computers 12(1), 53–67 (1995)

    Article  Google Scholar 

  7. Gong, J., Gajski, D.D., Narayan, S.: Software Estimation using a Generic-Processor Model. In: Proceedings of the 1995 European Conference on Design and Test, p. 498. IEEE Computer Society, Washington, DC (1995)

    Chapter  Google Scholar 

  8. Vahid, F., Gajski, D.D.: Specification Partitioning for System Design. In: Proceedings of the 29th ACM/IEEE Design Automation Conference, pp. 219–224. IEEE Computer Society Press, Los Alamitos (1992)

    Chapter  Google Scholar 

  9. Cai, L., Gajski, D.D.: Transaction Level Modeling: An Overview, http://www.cecs.uci.edu/conference_proceedings/isss_2003/cai_transaction.pdf

  10. Donlin, A.: Transaction Level Modeling: Flows and Use Models. In: Hardware/Software Codesign and System Synthesis, 2004. CODES + ISSS 2004, pp. 75–80. ACM, New York (2004)

    Chapter  Google Scholar 

  11. Wild, T., Herkersdorf, A., Ohlendorf, R.: Performance Evaluation for System-on-Chip Architectures using Trace-based Transaction Level Simulation. In: Proceedings of the Conference on Design, Automation and Test in Europe, pp. 248–253. European Design and Automation Association, Leuven (2006)

    Google Scholar 

  12. Buck, J., Ha, S., Lee, E.A., Messerschmitt, D.G.: Ptolemy: A Framework for Simulating and Prototyping Heterogeneous Systems, http://ptolemy.eecs.berkeley.edu/publications/papers/94/JEurSim/JEurSim.pdf

  13. Kohler, E., Morris, R., Chen, B., Jannotti, J., Kaashoek, F.M.: The Click Modular Router. ACM Trans. on Computer Systems 18(3), 263–297 (2000)

    Article  Google Scholar 

  14. Palesi, M.: Multi-Objective Design Space Exploration using Genetic Algorithms. In: Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES 2002. ACM, New York (2002)

    Google Scholar 

  15. The VaST Systems Technology Corporation, http://www.vastsystems.com

  16. RealView Platform Baseboard for the ARM11 MPCore, http://www.arm.com/products/DevTools/PB11MPCore.html

  17. Silven, O., Jyrkkä, K.: Observations on Power-Efficiency Trends in Mobile Communication Devices. EURASIP Journal on Embedded Systems (2007)

    Google Scholar 

  18. Hessel, S., Bruns, F., Bilgic, A., Lackorzynski, A., Härtig, H., Hausner, J.: Acceleration of the L4/Fiasco Microkernel Using Scratchpad Memory. In: International Workshop on Virtualization in Mobile Computing, MobiVirt 2008. ACM, New York (2008)

    Google Scholar 

  19. Evolved Universal Terrestrial Radio Access (E-UTRA), 3GPP Specifications: Rel8 (December 2008), http://www.3gpp.org

  20. Szczesny, D., Showk, A., Hessel, S., Hildebrand, U., Frascolla, V., Bilgic, A.: Performance Analysis of LTE Protocol Processing on an ARM based Mobile Platform. Accepted for 11th International Symposium on System-on-Chip (SoC 2009), Tampere, Finland (October 2009)

    Google Scholar 

  21. IBM® Rational® SDL SuiteTM, http://www.ibm.com/software/awdtools/sdlsuite/

  22. The Fiasco Microkernel, http://os.inf.tu-dresden.de/fiasco

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© 2009 Springer-Verlag Berlin Heidelberg

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Traboulsi, S. et al. (2009). SDL/Virtual Prototype Co-design for Rapid Architectural Exploration of a Mobile Phone Platform. In: Reed, R., Bilgic, A., Gotzhein, R. (eds) SDL 2009: Design for Motes and Mobiles. SDL 2009. Lecture Notes in Computer Science, vol 5719. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-04554-7_15

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  • DOI: https://doi.org/10.1007/978-3-642-04554-7_15

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-04553-0

  • Online ISBN: 978-3-642-04554-7

  • eBook Packages: Computer ScienceComputer Science (R0)

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