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International Conference on Architecture of Computing Systems

ARCS 2018: Architecture of Computing Systems – ARCS 2018 pp 239–251Cite as

Towards Fine-Grained DVFS in Embedded Multi-core CPUs

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Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 10793))

Abstract

Dynamic Voltage and Frequency Scaling (DVFS) is the preferred actuator for power-performance policies, and its use is growing also for thermal management. DVFS implementations, especially for embedded platforms, have historically provided only few possible operating points, despite this may impair the optimality of the frequency selection for a given application. Moreover, with multiple policies making use of it, the rate at which frequency and voltage changes will occur in a given system is expected to increase. The work presented in this paper has a two-fold objective: first, to present a methodology to extend a DVFS driver with additional operating points and second, to measure the impact of DVFS transitions from the performance and energy consumption perspective. This contribution can thus help both operating system and run-time manager designers to implement more efficient policies, as well as device driver programmers and hardware designers to optimize the DVFS infrastructure. The proposed approach has been tested on a quad-core ARM Cortex-A9 CPU based development board.

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Acknowledgments

This work was supported in part by the European Union funded project under the grant M2DC H2020-688201 (http://www.m2dc.eu/en/) and MANGO H2020-671668 (http://www.mango-project.eu/).

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Authors and Affiliations

  1. DEIB, Politecnico di Milano, Milan, Italy

    Giuseppe Massari, Federico Terraneo, Michele Zanella & Davide Zoni

Authors
  1. Giuseppe Massari
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  2. Federico Terraneo
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  3. Michele Zanella
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  4. Davide Zoni
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Corresponding author

Correspondence to Federico Terraneo .

Editor information

Editors and Affiliations

  1. Chair for Chip Design for Embedded Computing, Technische Universität Braunschweig, Braunschweig, Germany

    Mladen Berekovic

  2. Chair for Chip Design for Embedded Computing, Technische Universität Braunschweig, Braunschweig, Germany

    Rainer Buchty

  3. Institute of Computer Engineering, Universität zu Lübeck, Lübeck, Germany

    Heiko Hamann

  4. School of Computer Science, The University of Manchester, Manchester, United Kingdom

    Dirk Koch

  5. Institute for Information Technology and Communications, Otto-von-Guericke Universität Magdeburg, Magdeburg, Germany

    Thilo Pionteck

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Massari, G., Terraneo, F., Zanella, M., Zoni, D. (2018). Towards Fine-Grained DVFS in Embedded Multi-core CPUs. In: Berekovic, M., Buchty, R., Hamann, H., Koch, D., Pionteck, T. (eds) Architecture of Computing Systems – ARCS 2018. ARCS 2018. Lecture Notes in Computer Science(), vol 10793. Springer, Cham. https://doi.org/10.1007/978-3-319-77610-1_18

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  • DOI: https://doi.org/10.1007/978-3-319-77610-1_18

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  • Publisher Name: Springer, Cham

  • Print ISBN: 978-3-319-77609-5

  • Online ISBN: 978-3-319-77610-1

  • eBook Packages: Computer ScienceComputer Science (R0)

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