Abstract
A key issue in the implementation of real-time systems is the ability to statically analyse the timing behaviour of the system, to ensure that important timing requirements are met. The increasing complexity of modern processors make the determination of the worst-case execution time of software difficult via analytical means.
This paper discusses the compilation of Ada programs directly to hardware circuits, so removing the need for a processor. The solution is discussed in terms of Ada (specifically a Ravenscar / SPARK subset). The contributions of the paper are twofold. Firstly, the compilation of Ada to hardware (Field-Programmmable Gate Arrays) is described. Secondly, issues with the Ada language are addressed. These relate to processor concepts (eg. interrupts, representation clauses) that are embodied in the language that need to be modified for compilation to hardware.
This work was supported by EPSRC and BAE SYSTEMS
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Ward, M., Audsley, N.C. (2002). Language Issues of Compiling Ada to Hardware. In: Blieberger, J., Strohmeier, A. (eds) Reliable Software Technologies — Ada-Europe 2002. Ada-Europe 2002. Lecture Notes in Computer Science, vol 2361. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-48046-3_7
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DOI: https://doi.org/10.1007/3-540-48046-3_7
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