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Processor Directed Dynamic Page Policy

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Advances in Computer Systems Architecture (ACSAC 2006)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4186))

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Abstract

The widening gap between today’s processor and memory performance makes memory subsystem design an increasingly important part of computer design. Processor directed dynamic page policy is proposed by investigating the memory access patterns of applications. Processor directed dynamic page policy changes page mode adaptively in accordance with the directions of processor. It combines the advantages of close page policy and open page policy. The processor directed dynamic page policy is based on future memory access behavior. Compared with the direction information of existing dynamic page policies which is based on the history of memory access behavior, the direction information of processor directed dynamic page policy is more accurate. Furthermore, memory access requests of processor are scheduled based on the page policy to increase the page hit rate and reduce page conflict miss rate. The performance of SPEC CPU2000 benchmarks is improved significantly. The IPC is improved by 7.1%, 5.9% and 3.4% on average compared with close page policy, open page policy and conventional dynamic page policy, respectively.

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© 2006 Springer-Verlag Berlin Heidelberg

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Huan, D., Li, Z., Hu, W., Liu, Z. (2006). Processor Directed Dynamic Page Policy. In: Jesshope, C., Egan, C. (eds) Advances in Computer Systems Architecture. ACSAC 2006. Lecture Notes in Computer Science, vol 4186. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11859802_10

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  • DOI: https://doi.org/10.1007/11859802_10

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-40056-1

  • Online ISBN: 978-3-540-40058-5

  • eBook Packages: Computer ScienceComputer Science (R0)

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