Skip to main content

Dynamic Voltage Scaling for Real-Time Scheduling of Multimedia Tasks

  • Conference paper
Book cover Advances in Multimedia Information Processing - PCM 2005 (PCM 2005)

Part of the book series: Lecture Notes in Computer Science ((LNISA,volume 3768))

Included in the following conference series:

  • 987 Accesses

Abstract

Real-time multimedia applications are usually played back many times. For those applications, the distribution of actual execution time is no longer unknown from the second playback. In this paper, we propose a novel dynamic voltage scaling (DVS) algorithm, called CLDVS, for scheduling real-time multimedia applications. In order to minimize energy consumption, CLDVS determines the processor’s operating frequency and supply voltage using the distribution of actual execution time during a time interval at the beginning of the interval. For that, all active tasks in the time interval are identified and incrementally placed on the time vs. scaling factor space in order to reduce variations of the scaling factor for minimum energy consumption. Simulation experiments show CLDVS achieves enormous energy savings and outperforms the existing DVS algorithms with different dynamic workload characteristics.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 84.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Gruian, F.: Hard real-time scheduling for low-energy using stochastic data and DVS processors. In: Proceedings of the 2001 International Symposium on Low Power Electronics and Design, pp. 46–51 (2001)

    Google Scholar 

  2. Pillai, P., Shin, K.G.: Real-time dynamic voltage scaling for low-power embedded operating systems. In: Proceedings of the 18th ACM Symposium on Operating System Principles, pp. 89–102 (2001)

    Google Scholar 

  3. Aydin, H., Mejía-Alvarez, P., Mossé, D., Melhem, R.G.: Dynamic and aggressive scheduling techniques for power-aware real-time systems. In: Proceedings of the 22nd IEEE Real-Time Systems Symposium, pp. 95–105 (2001)

    Google Scholar 

  4. Aydin, H., Melhem, R.G., Mossé, D., Mejía-Alvarez, P.: Power-aware scheduling for periodic real-time tasks. IEEE Trans. Computers 53, 584–600 (2004)

    Article  Google Scholar 

  5. Zhu, D., Melhem, R.G., Childers, B.R.: Scheduling with dynamic voltage/speed adjustment using slack reclamation in multiprocessor real-time systems. IEEE Trans. Parallel Distrib. Syst. 14, 686–700 (2003)

    Article  Google Scholar 

  6. Lee, C.H., Shin, K.G.: On-line dynamic voltage scaling for hard real-time systems using the EDF algorithm. In: Proceedings of the 25th IEEE Real-Time Systems Symposium, pp. 319–327 (2004)

    Google Scholar 

  7. Burd, T.D., Brodersen, R.W.: Energy efficient CMOS microprocessor design. In: Proceedings of the 28th Annual Hawaii International Conference on System Sciences, pp. 288–297 (1995)

    Google Scholar 

  8. Ernst, R., Ye, W.: Embedded program timing analysis based on path clustering and architecture classification. In: Proceedings of the International Conference on Computer-Aided Design, pp. 598–604 (1997)

    Google Scholar 

  9. Weiser, M., Welch, B., Demers, A.J., Shenker, S.: Scheduling for reduced CPU energy. In: Proceedings of the First USENIX Symposium on Operating Systems Design and Implementation, pp. 13–23 (1994)

    Google Scholar 

  10. Pering, T., Burd, T., Brodersen, R.W.: The simulation and evaluation of dynamic voltage scaling algorithms. In: Proceedings of the 1998 International Symposium on Low Power Electronics and Design, pp. 76–81 (1998)

    Google Scholar 

  11. Liu, C.L., Layland, J.W.: Scheduling algorithms for multiprogramming in a hard-real-time environment. J. ACM 20, 46–61 (1973)

    Article  MATH  MathSciNet  Google Scholar 

  12. Zhu, D., Mossé, D., Melhem, R.G.: Power-aware scheduling for AND/OR graphs in real-time systems. IEEE Trans. Parallel Distrib. Syst. 15, 849–864 (2004)

    Article  Google Scholar 

  13. Shin, D., Kim, W., Jeon, J., Kim, J., Min, S.L.: SimDVS: An integrated simulation environment for performance evaluation of dynamic voltage scaling algorithms. In: Falsafi, B., VijayKumar, T.N. (eds.) PACS 2002. LNCS, vol. 2325, pp. 141–156. Springer, Heidelberg (2003)

    Chapter  Google Scholar 

  14. Transmeta Corporation (2005), http://www.transmeta.com/crusoe/longrun.htm

  15. Intel Corporation (2005), http://developer.intel.com/design/intelxscale/benchmarks.htm

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2005 Springer-Verlag Berlin Heidelberg

About this paper

Cite this paper

Seong, Y.R., Gong, MS., Oh, H.R., Lee, CH. (2005). Dynamic Voltage Scaling for Real-Time Scheduling of Multimedia Tasks. In: Ho, YS., Kim, HJ. (eds) Advances in Multimedia Information Processing - PCM 2005. PCM 2005. Lecture Notes in Computer Science, vol 3768. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11582267_9

Download citation

  • DOI: https://doi.org/10.1007/11582267_9

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-30040-3

  • Online ISBN: 978-3-540-32131-6

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics