In this study, the fundamental electro-optical characteristics of metal oxide thin film transistor (IGZO TFT) were investigated, and some important derivative devices were also developed. In fact, a high performance IGZO TFT is fabricated easily. However, its variability and instability retard the progress of commercialization. For its instability, it is presented by the behavior of carrier trapping. Either of electron and hole could be trapped at the dielectric surface under an electric field to result the undermined position of threshold voltage. In this study, we attempt to clarify the mechanism of instable behavior of IGZO TFT and reveal how the improving treatments, thermal annealing and passivation, take effect. We have found that the instability is strongly dependent on the oxygen content in IGZO thin film. The instability of IGZO TFT under different polar gate bias stresses will exhibits a symmetric behavior. Higher oxygen content IGZO will correspond to well endurance against negative bias stress and poor endurance under positive bias stress; the TFT with lower oxygen content will exhibit opposite instability behavior. The IGZO TFT with a lower temperature deposited IGZO active layer only can endue one polar bias stress; the stability under another polar bias stress is always poor. The post treatment, thermal annealing, can improve the entire stability under both polar bias stresses. However, the expectation of low temperature fabrication will be destroyed. For its variability, it is presented by the variation in carrier concentration. Any of deposition condition, annealing condition, illumination and surrounding atmosphere could make a change in dopant concentration. Although post thermal annealing can improve the stability of IGZO TFT, the carrier concentration will also be increased or decreased, depends on the furnace atmosphere. Therefore, the annealing conditions like atmosphere should be chose carefully. Besides, strong ultraviolet illumination could make oxygen vacancy to increase the carrier concentration. Therefore, strong ultraviolet can be employed to slightly modulate the oxygen content (the stability under bias stress may be improved) or even make conductive (the conductivity of IGZO can be raised by four orders). The light treated IGZO domain can serve as the source/drain contact in IGZO TFT and its performance is comparable with the metal pad. In this thesis, we propose an assumption different from the common explanation on light effect. We consider that illumination can be regarded as a prompter enhancing the carrier trapping process. Illumination alone will not make the negative shift in threshold voltage. The negatively shifted transfer curve under illuminatin is caused by the applied negative gate bias, which results hole trapping, when scanning the gate voltage. Although IGZO is a transparent material, in fact, it exhibits intense response to light and the effective color ranges from ultraviolet to infrared. Illumination will make dopping process and electron/hole trapping at the dielectric surface. Although IGZO TFT is responsive to visible light and could exhibit a real-time negative photo current caused by electron trapping, we also introduce a light absorption layer in the IGZO TFT to improve the sensibility to visible light. The proposed photo transistor possesses a simple structure; an organic low bandgap material, P3HT (Eg = 2.1 eV), is spun coat on the standard bottom gate IGZO TFT. The P3HT/IGZO junction is a p-n diode and forms a build-in voltage drop across the junction. The excitions will be generated by visible light at the low band gap P3HT layer and the electrons will be injected into the IGZO by the build in electric field to form a back channel. The injected electrons in IGZO possess high mobility to conduct abundant photo current. This proposed photo transistor response to illumination by a positive photo current which is different from the standard device with negative photo current. To date, the drawback of IGZO TFT, limits the realistic application, is the instable behavior. However, for other applications, this drawback may be an advantage. An unstable IGZO TFT, exhibits poor endurance to positive gate bias and have abundant electron trap states, can be fabricated easily at room temperature without post annealing treatment. Possessing abundant electron trap states represents that it is an excellent memory without any intended mechanism for carrier trapping. The writing operation is defined as a VG pulse (VG = 20 V, 20s) to move the transfer curve in the direction of positive gate voltage; the erasing operation is defined as an illumination accompanied VG pulse (VG = - 20 V, 20s, UV) to move the transfer curve in the direction of negative gate voltage. This proposed memory exhibits a significant threshold voltage window of 30 V and an on/off ratio of 105. Furthermore, this device performs well repeatability under writing/erasing cycles. Another feasible application of this device is the real-time photo detector. The UV made negative shift in threshold can be compensated by positive VG pulses promptly, which leads to a real-time photo transistor. In fact, generally photo transistors are unable to perform real-time sensing. The proposed real-time photo detector in this thesis has a significant light/dark ratio of 105. This is the best metal oxide based photo detector nowadays. Another important device for application is inverter. If we attempt to fabricate a basic logic unit, inverter, using metal oxide based transistors, we will face a problem of the unfeasibility of CMOS structure because the lack of p-type metal oxide material. Therefore the threshold voltage modulation seems the unique solution. Threshold voltage modulation can be achieved by a conventional dual gate structure. In this study, we propose a novel dual gate TFT using a floating metallic back gate; the gate is floating, implying additional power supply is not necessary during device operation. The bias provided by floating gate to IGZO body comes from the work function difference. Since there is almost no dielectric layer located between floating gate and IGZO, the controllability of floating gate to IGZO body is much high; a little build in voltage can bring a noticeable threshold voltage shift. No matter depletion mode and enhance mode TFTs with excellent performance can be fabricated using this dual gate structure. The advantages of this dual gate device are high performance, unnecessary of additional power supply and unnecessary of additional dielectric layer. Finally, a high performance inverter comprised of the proposed dual gate TFTs is demonstrated in this study.