Failure Analysis of a SiC MOS Capacitor with a Poly-Si Gate Electrode

Soshi Sato; Kikuo Yamabe; Tetsuo Endoh; Masaaki Niwa

doi:10.4028/www.scientific.net/MSF.858.485

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Threshold Voltage Instabilities of Present SiC-Power MOSFETs under Positive Bias Temperature Stress
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HomeMaterials Science ForumMaterials Science Forum Vol. 858Failure Analysis of a SiC MOS Capacitor with a...

Failure Analysis of a SiC MOS Capacitor with a Poly-Si Gate Electrode

Abstract:

The failure mechanism of a SiC metal-oxide-semiconductor capacitor with a poly-Si gate electrode was investigated by time-dependent dielectric breakdown testing under a 200-nA constant current stress. The capacitor exhibited both hard and soft breakdowns. After dielectric breakdown in both cases, adjacent concaves were observed on the capacitor with a field-emission scanning electron microscope. Additional optical beam-induced resistance changes and photo-emission analysis of a capacitor after hard-breakdown located a failure point on the periphery of a group of adjacent concaves. Cross-sectional scanning transmission electron microscope observation revealed that a narrow, vertical defect had formed at this point on the SiC substrate.

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Silicon Carbide and Related Materials 2015

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Periodical:

Materials Science Forum (Volume 858)

Pages:

485-488

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.858.485

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Online since:

May 2016

Authors:

Soshi Sato*, Kikuo Yamabe, Tetsuo Endoh, Masaaki Niwa

Keywords:

MOS, Photo-Emission, Poly-Si, Silicon Carbide (SiC), TDDB

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* - Corresponding Author

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