A Study of High Temperature DC and AC Gate Stressing on the Performance and Reliability of Power SiC MOSFETs

Ronald Green; A.J. Lelis; M. El; Daniel B. Habersat

doi:10.4028/www.scientific.net/MSF.740-742.549

Paper Titles

Verification of Near-Interface Traps Models by Electrical Measurements on 4H-SiC n-Channel Mosfets
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Correlation of Interface Characteristics to Electron Mobility in Channel-Implanted 4H-SiC Mosfets
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Characterization of POCl₃-Annealed 4H-Sic Mosfets by Charge Pumping Technique
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Evaluation of PBTS and NBTS in SiC MOS Using In Situ Charge Pumping Measurements
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A Study of High Temperature DC and AC Gate Stressing on the Performance and Reliability of Power SiC MOSFETs
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Gate Oxide Stability of 4H-SiC MOSFETs under On/Off-State Bias-Temperature Stress
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Evidence of Tunneling in n-4H-SiC/SiO₂ Capacitors at Low Temperatures
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Boron Diffusion in Silicon Carbide
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Recombination and Excess Currents in 4H-SiC Structure with Low-Doped n-Region
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HomeMaterials Science ForumMaterials Science Forum Vols. 740-742A Study of High Temperature DC and AC Gate...

A Study of High Temperature DC and AC Gate Stressing on the Performance and Reliability of Power SiC MOSFETs

Abstract:

Although high-temperature measurements show a dramatic reduction in the bias-temperature stress-induced threshold-voltage instability of present state-of-the-art devices, a more thorough test methodology shows that several different conclusions may actually be drawn. The particular conclusion depends on the specific post-BTS measurement technique employed. Immediate room-temperature measurements suggest that significant oxide-trap activation may still be occurring. A significant, yet rapid, post-BTS recovery is observed as well. These results underline the importance of making both high-temperature and room-temperature measurements, as a function of stress and recovery time, to better ensure that the full effect of the BTS is observed. Initial AC BTS results suggest a similar level of device degradation as occurs from a DC BTS.

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Periodical:

Materials Science Forum (Volumes 740-742)

Pages:

549-552

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.740-742.549

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Online since:

January 2013

Authors:

Ronald Green, A.J. Lelis, M. El, Daniel B. Habersat

Keywords:

BTS, Interface Trap, MOSFET, Oxide Trap, Reliability

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References

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