Paper Titles

Comparative Simulation Study of Dynamic Behavior of the Body-Diode for 4H-SiC JFET and MOSFET
p.817

Potential of 4H-SiC CMOS for High Temperature Applications Using Advanced Lateral p-MOSFETs
p.821

Analytical Description of the Input Capacitance of 4H-SiC DMOSFET’s in Presence of Oxide-Semiconductor Interface Traps
p.825

Characteristics of High-Threshold-Voltage Low-Loss 4H-SiC MOSFETs with Improved MOS Cell Structure
p.829

Comparison of Test Methods for Proper Characterization of V_T in SiC MOSFETs
p.833

The Influence of Surface Pit Shape on 4H-SiC MOSFETs Reliability under High Temperature Bias Tests
p.840

Si/SiC Substrates for the Implementation of Linear-Doped Power LDMOS Studied with Device Simulation
p.844

Trench-MOSFETs on 4H-SiC
p.848

SiC Power Switches Evaluation for Space Applications Requirements
p.852

HomeMaterials Science ForumMaterials Science Forum Vol. 858Comparison of Test Methods for Proper...

Comparison of Test Methods for Proper Characterization of V_T in SiC MOSFETs

Article Preview

Abstract:

A survey of methods for characterizing threshold voltage (VT) drift when applied to commercial SiC DMOSFETs was conducted to explore how results can vary from one test to another. Typical linear-with-log-stress-time VT drift was observed with a rate of increase near 50–60 mV/dec for all methods. However, the magnitude of the drift varied greatly depending on the time delay between stress and measurement. A power law recovery ( ) common to all methods results in much smaller VT drifts when using slower methods, meaning long delays between stress and measurement can lead to tests that are unable to adequately discriminate bad devices from good.

You might also be interested in these eBooks

Silicon Carbide and Related Materials 2015

Info:

Periodical:

Materials Science Forum (Volume 858)

Pages:

833-839

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.858.833

Citation:

Cite this paper

Online since:

May 2016

Authors:

Daniel B. Habersat*, Aivars J. Lelis, Ronald Green, Mooro El

Keywords:

Bias Temperature Stress, MOSFET, Oxide Traps, Reliability Evaluation, Silicon Carbide (SiC), Threshold Voltage Drift

Export:

RIS, BibTeX

Price:

Permissions:

Request Permissions

* - Corresponding Author

[1] A. J. Lelis, R. Green, D. B. Habersat, and M. El, Basic Mechanisms of Threshold-Voltage Instability and Implications for Reliability Testing of SiC MOSFETs, Electron Devices IEEE Trans. On, vol. 62, no. 2, p.316–323, Feb. (2015).

DOI: 10.1109/ted.2014.2356172

[2] T. Grasser, B. Kaczer, W. Gös, H. Reisinger, T. Aichinger, P. Hehenberger, P. -J. Wagner, F. Schanovsky, J. Franco, M. T. Luque, and M. Nelhiebel, The Paradigm Shift in Understanding the Bias Temperature Instability: From Reaction-Diffusion to Switching Oxide Traps, IEEE Trans. Electron Devices, vol. 58, no. 11, p.3652–3666, Nov. (2011).

DOI: 10.1109/ted.2011.2164543

[3] M. Sometani, D. Okamoto, S. Harada, H. Ishimori, S. Takasu, T. Hatakeyama, M. Takei, Y. Yonezawa, K. Fukuda, and H. Okumura, Exact Characterization of Threshold Voltage Instability in 4H-SiC MOSFETs by Non-Relaxation Method, Mater. Sci. Forum, vol. 821–823, p.685–688, Jun. (2015).

DOI: 10.4028/www.scientific.net/msf.821-823.685

[4] M. Gurfinkel, H. D. Xiong, K. P. Cheung, J. S. Suehle, J. B. Bernstein, Y. Shapira, A. J. Lelis, D. Habersat, and N. Goldsman, Characterization of Transient Gate Oxide Trapping in SiC MOSFETs Using Fast I – V Techniques, Electron Devices IEEE Trans. On, vol. 55, no. 8, p.2004–2012, (2008).

DOI: 10.1109/ted.2008.926626

[5] A. Lelis, R. Green, M. El, and D. Habersat, Effect of Stress and Measurement Conditions in Determining the Reliability of SiC Power MOSFETs, ECS Trans., vol. 50, no. 3, p.251–256, Mar. (2013).

DOI: 10.1149/05003.0251ecst

[6] R. Green, A. Lelis, and D. Habersat, Application of reliability test standards to SiC Power MOSFETs, in Reliability Physics Symposium (IRPS), 2011 IEEE International, 2011, p. EX. 2. 1 –EX. 2. 9.

DOI: 10.1109/irps.2011.5784573

[7] B. Ozpineci and L. Tolbert, Smaller, Faster, Tougher, IEEE Spectrum, Oct-(2011).

DOI: 10.1109/mspec.2011.6027247

[8] Wide Bandgap Semiconductors: Pursuing the Promise, U.S. Department of Energy, Energy Efficiency & Renewable Energy, DOE/EE-0910, Apr. (2013).

[9] B. Kaczer, V. Arkhipov, R. Degraeve, N. Collaert, G. Groeseneken, and M. Goodwin, Disorder-controlled-kinetics model for negative bias temperature instability and its experimental verification, in Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International, 2005, p.381.

DOI: 10.1109/relphy.2005.1493117

[10] A. Kerber, E. Cartier, L. Pantisano, M. Rosmeulen, R. Degraeve, T. Kauerauf, G. Groeseneken, H. E. Maes, and U. Schwalke, Characterization of the VT-instability in SiO2/HfO2 gate dielectrics, 2003, p.41 – 45.

DOI: 10.1109/relphy.2003.1197718

[11] T. Grasser, Stochastic charge trapping in oxides: From random telegraph noise to bias temperature instabilities, Microelectron. Reliab., vol. 52, no. 1, p.39–70, Jan. (2012).

DOI: 10.1016/j.microrel.2011.09.002

[12] G. Pobegen and T. Grasser, Efficient Characterization of Threshold Voltage Instabilities in SiC nMOSFETs Using the Concept of Capture-Emission-Time Maps, Mater. Sci. Forum, vol. 740–742, p.757–760, Jan. (2013).

DOI: 10.4028/www.scientific.net/msf.740-742.757

[13] S. Potbhare, N. Goldsman, A. Lelis, J. M. McGarrity, F. B. McLean, and D. Habersat, A Physical Model of High Temperature 4H-SiC MOSFETs, Electron Devices IEEE Trans. On, vol. 55, no. 8, p.2029–2040, (2008).

DOI: 10.1109/ted.2008.926665

[14] D. B. Habersat and A. J. Lelis, Improved Observation of SiC/SiO2 Oxide Charge Traps Using MOS C-V, Mater. Sci. Forum, vol. 679–680, p.366–369, Mar. (2011).

DOI: 10.4028/www.scientific.net/msf.679-680.366

[15] JEDEC Standard - Temperature, Bias, and Operating Life, JEDEC Solid State Technology Association, JESD22-A108D, Nov. (2010).

[16] M. Denais, C. Parthasarathy, G. Ribes, Y. Rey-Tauriac, N. Revil, A. Bravaix, V. Huard, and F. Perrier, On-the-fly characterization of NBTI in ultra-thin gate oxide PMOSFET's, 2004, p.109 – 112.

DOI: 10.1109/iedm.2004.1419080