Design and Implementation of Data Acquisition System Based on FPGA and High-Speed AD

Zhi Li; Da Hua Chen

doi:10.4028/www.scientific.net/AMM.556-562.1515

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 556-562Design and Implementation of Data Acquisition...

Design and Implementation of Data Acquisition System Based on FPGA and High-Speed AD

Abstract:

High speed analog signals output by test object in the field of testing and controlling is typical. This paper designed a high-speed AD data acquisition system responding to this situation. In the design of the system, data is first conditioned by the analog channel. FPGA is then employed to receive, decelerate, reorganize and store the high-speed LVDS data output by AD. Data is displayed in computer after being collected by ARM from FGPA. Real circuit designing demonstrated that the high-speed data acquisition system of AD based on 100M bandwidth of analog channel is workable.

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Periodical:

Applied Mechanics and Materials (Volumes 556-562)

Pages:

1515-1519

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.556-562.1515

Citation:

Cite this paper

Online since:

May 2014

Authors:

Zhi Li*, Da Hua Chen

Keywords:

Analog Channels, FPGA, High-Speed AD, LVDS Signal

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* - Corresponding Author

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