A Self-Powered UHF Passive Tag for Biomedical Temperature Monitoring

Abstract

Self-powered RF passive sensors have potential application in temperature measurements of patients with health problems. Herein, this work presents the design and implementation of a self-powered UHF passive tag prototype for biomedical temperature monitoring. The proposed battery-free sensor is composed of three basic building blocks: a high-frequency section, a micro-power management stage, and a temperature sensor. This passive temperature sensor uses an 860 MHz to 960 MHz RF carrier and a 1 W Effective Isotropic Radiated Power (EIRP) to harvest energy for its operation, showing a read range of 9.5 m with a 13.75 µW power consumption, and an overall power consumption efficiency of 10.92% was achieved. The proposed device can measure temperature variations between 0 °C and 60 °C with a sensitivity of 823.29 Hz/°C and a standard error of 13.67 Hz/°C over linear regression. Circuit functionality was validated by means of post-layout simulations, characterization, and measurements of the manufactured prototype. The chip prototype was fabricated using a 0.18 µm CMOS standard technology with a silicon area consumption of 1065 µm × 560 µm. The overall size of the self-powered passive tag is 8 cm × 2 cm, including both chip and antenna. The self-powered tag prototype could be employed for human body temperature monitoring.

1. Introduction

In the last decades, many sensors have been implemented using on-the-shelf circuitry, enabling data acquisition and processing of several biomedical parameters such as electrocardiogram (ECG), electroencephalography (EEG), electromyographic (EMG) and body temperature. However, these on-the-shelf biomedical electronic instrumentation systems are bulky, full of wires, and present high power consumption. These characteristics are not especially appealing for biomedical environments where portability, comfort, and low-power consumption (long battery lifetime) are desirable or even mandatory. To overcome such issues, the on-the-shelf biomedical electronic instrumentation architectures have been migrated towards CMOS and MEMs fabrication technologies, enabling System On a Chip (SoC) design.

SoC technology is capable of embedding biomedical sensors with its instrumentation circuits and communication systems both wired [1,2,3] and wireless [4,5,6,7,8,9,10,11]. However, in recent years, special attention has been focused on wireless biomedical sensors because they are capable of real-time 24/7 monitoring while providing greater mobility to the patient [12]. These characteristics help improve the quality of life of the patient during their stay in a medical unit.

In addition, organic polymer functional inks, carbon-based nanomaterials, and metallic nanoparticles [13,14,15] have enabled the implementation of sensors on flexible substrates. These materials increase the application of SoC in soft and irregular shaped surfaces such as the human skin or textile fabrics [16] without altering its wireless communication capabilities [17]. However, most of the fabrication techniques for flexible sensors do not offer reliable results in terms of device repeatability and require post-processing steps such as screen-printing, inkjet printing, laser cutting, and laser trimming [16].

Wireless biomedical sensors usually need batteries that must be periodically replaced due to their limited lifetime. To decrease the use of these batteries, self-powered sensors can be designed to convert the environment energy into electrical energy through piezoelectric devices [18,19], thermoelectric generators [20,21], mini solar cells [20], soil energy [22], and Radio Frequency (RF) links [23], among others. Self-powered RF passive sensors for biomedical temperature measurements offer advantages such as simple configuration (e.g., a RF reader and a passive tag), low-power consumption, and a wide reading range.

Nowadays, the SARS-CoV-2 pandemic has modified the conventional health protocols to reduce the number of infections in humans. In this regard, self-powered RF temperature sensors are a good option for 24/7 monitoring, helping to make a timely diagnosis of this disease, avoiding its evolution in patients and slowing its dispersion [24,25,26,27].

Self-powered RF passive sensors for temperature monitoring can be classified into two major types: sensors based on the frequency of the RF links and sensors with or without a silicon chip. Self-powered RF passive sensors can be designed to operate in the Low Frequency (LF) [28,29,30] or Ultra High Frequency (UHF) [31,32,33,34] radio bands, enabling short or large read ranges, respectively. On the other hand, chipless sensors use the variation of electrical properties of the antenna substrate as a function of temperature to modify the reflection coefficient [35,36,37,38] or to modify the resonant frequency of an LC tank [39,40]. On-chip self-powered RF passive sensors make use of frequency deviated oscillators [41,42,43] or voltage/current references [32,44,45,46] to map the temperature information and send it to the reader. Furthermore, self-powered temperature sensors may use a communication protocol [41,43,44,47,48] or not employ a protocol [42,49,50,51,52]. The self-powered sensors that do not use a communication protocol are called non-intermittent or RFID-like. The passive sensor must use Amplitude-Shift-Keying (ASK) and/or Phase-Shifth-Keying (PSK) backscatter modulation when Electronic Product Code (EPC) Gen-2 protocol is implemented. However, the passive sensors that do not use a communication protocol may employ any kind of backscatter modulation, like ASK or PSK, or may generate its own carrier under very simple modulations schemes like On-Off-Keying (OOK) or burst.

Herein, this work presents the development of a non-intermittent self-powered UHF passive tag prototype for biomedical temperature monitoring using a 0.18 µm CMOS technology. The proposed device shows a reading range of 9.5 m using an RF link budget of 1 W EIRP. This device can measure temperature alterations from 0 °C to 60 °C with a sensitivity of 823.29 Hz/°C and a standard error of 13.67 Hz/°C over linear regression. The overall size of the self-powered passive tag is 8 cm × 2 cm, regarding both chip and antenna. The proposed sensor could have potential application for human body temperature monitoring because it is a portable system which does not require conventional batteries. This work is organized as follows. Section 2 presents the architecture of the proposed self-powered sensor and discusses the required circuits. Section 3 introduces a bottom-up design methodology for the proposed sensor prototype and shows post-layout simulations. Section 4 presents and discusses the implemented test-benches used to measure the fabricated prototype. Finally, Section 5 draws the conclusions.

2. Architecture of Proposed Self-Powered Passive Tag

The block diagram of the proposed self-powered passive tag prototype for biomedical temperature monitoring is presented in Figure 1. This battery-free passive temperature sensor is composed of three basic building blocks: a High Frequency (HF) section, a Power Management (PM) section, and a Low Frequency (LF) section. This prototype is included in the non-intermittent or RFID-like category because no communication protocol is implemented.

The HF section collects the electromagnetic energy available in the surrounding environment using a dipole antenna, a matching network, and a differential power harvester. The HF section transmits the temperature information using an Amplitude-Shift-Keying (ASK) backscatter modulator. Finally, the PM section regulates all the energy gathered by the HF section and generates the voltage and current to supply and bias the LF section; these tasks are done with the aim of a shunt regulator, a voltage/current reference, and a Low Drop Out (LDO) voltage regulator. The LF section measures the temperature and produces a proportional deviation on the frequency of the ring oscillator.

Since the proposed passive tag is battery-free and the energy collected for its operation is harvested from an RF link, the design methodology of the proposed RF passive temperature sensor must follow a low-power, low-voltage philosophy as well as a bottom-up circuit design strategy. In order to comply with the low-voltage/power design philosophy, the transistors of all the tag blocks must operate in the subthreshold, linear, or saturation region.

Under sub-threshold region, the $I_{D_n}$ drain current of the $n-th$ transistor is determined by Equation (1), where $k_n$ is the transistor aspect ratio $W_n/L_n$, $V_{G{S}_n}$ is the gate-source voltage, $V_{T{H}_n}$ is the threshold voltage, $V_{D{S}_n}$ is the drain-source voltage, and $\eta$ is the sub-threshold slope. Furthermore, $V_T=kT/q$ is the thermal voltage and $I_o=\mu C_{ox}(\eta -1)V_T^2$ is the saturation current where k is the Boltzmann coefficient, T is the absolute temperature, q is the electron charge, $\mu$ is the electron or hole mobility, and $C_{ox}$ is the silicon dioxide capacitance. For $V_{D{S}_n}>4V_T$, the second exponential of Equation (1) can be neglected to obtain Equation (2).

$$I_{D_n}=k_n·I_o·e^{\frac{V_{G{S}_n}-V_{T{H}_n}}{\eta V_T}}·\left(1-e^{-\frac{V_{D{S}_n}}{V_T}}\right)$$

(1)

$$I_{D_n}\approx k_n·I_o·e^{\frac{V_{G{S}_n}-V_{T{H}_n}}{\eta V_T}}$$

(2)

If the transistor is biased to operate in the linear region, its drain current can be calculated using Equation (3), where $\lambda$ is the transistor channel length modulation. By neglecting $\lambda$ and assuming a very small $V_{D{S}_n}$, Equation (3) can be simplified into Equation (4).

$$I_{D_n}=\mu ·C_{ox}·k_n\left[(V_{G{S}_n}-V_{T{H}_n})V_{D{S}_n}-\frac{V_{D{S}_n}^2}{2}\right]·(1+\lambda V_{D{S}_n})$$

(3)

$$I_{D_n}\approx \mu ·C_{ox}·k_n·(V_{G{S}_n}-V_{T{H}_n})·V_{D{S}_n}$$

(4)

Likewise, the $I_{D_n}$ drain current of a transistor biased in saturation regime is given by Equation (5), which can be simplified into Equation (6) if the effect of the terms $\lambda$ and $V_{D{S}_n}$ are neglected.

$$I_{D_n}=\frac{1}{2}·\mu ·C_{ox}·k_n·{(V_{G{S}_n}-V_{T{H}_n})}^2·(1+\lambda V_{D{S}_n})$$

(5)

$$I_{D_n}=\frac{1}{2}·\mu ·C_{ox}·k_n·{(V_{G{S}_n}-V_{T{H}_n})}^2$$

(6)

Based on a bottom-up strategy, the building blocks of the proposed temperature sensor are described as follows. First, the LF section is designed to provide a temperature dependent oscillation, followed by the PM section where the minimum supply and all the bias voltages and currents are set. Finally, the HF section is designed to harvest all the power consumed by the PM and LF sections.

2.1. Low Frequency (LF) Section

The LF section uses a linearly Positive Temperature Coefficient (PTC) deviated oscillator working as temperature sensor and a chain of digital inverters that operate as a voltage buffer (red-dashed line box in Figure 1). The PTC oscillator uses a Proportional To Absolute Temperature (PTAT) $I_P$ current to ensure and enhance its positive dependence on temperature and delivers a $v_{osc}$ voltage square wave that is fed into a voltage buffer that drives the ASK backscatter modulator embedded in the HF section.

2.1.1. PTC Temperature Sensor

The proposed PTC ring oscillator is presented in Figure 2. It uses five Flipped Voltage Follower (FVF) cells ($m_1-m_3,m_{p_1}$) which are biased by some current mirrors ($m_{n_1}$,$m_{p_1}$) and uses the $V_{I_P}$ voltage to generate a PTAT $I_P$ current; a single FVF cell is colored blue where $i_i$ is its input current and $i_o$ is its output current. The gate terminal of all $m_3$ transistors is connected to the $V_{REF}$ temperature-compensated reference voltage. Transistors $m_4$ and $m_{p_1}$ are used to obtain the output voltage $v_{osc}$. All transistors operate in the subthreshold region, reducing the power consumption.

Based on the Barkhausen criterion, the oscillation frequency ${\omega }_{osc}$ of a ring oscillator and the minimum open-loop gain $A_{min}$ to sustain such oscillation are given by Equation (7), where N is the number of FVF cells and ${\omega }_p$ is the dominant pole of the FVF cell.

$${\omega }_{osc}={\omega }_p·tan\left(\frac{{180}^{\circ }}{N}\right),A_{min}\ge \sqrt{1+{\left[tan\left(\frac{{180}^{\circ }}{N}\right)\right]}^2}$$

(7)

By considering Equation (7), the pole location of the FVF must be known. To this end, the small-signal model of the FVF cell must be derived. The small-signal model is drawn in Figure 3, where $C_i=C_{d{b}_1}+C_{d{g}_1}+C_{s{b}_3}+C_{g{s}_3}$ and $C_a=C_{g{d}_1}+C_{g{s}_1}+C_{g{s}_2}+C_{g{d}_2}+C_{g{d}_3}+C_{d{b}_3}+C_{g{d}_{p1}}+C_{d{b}_{p1}}$. After solving the small-signal model for $i_o/i_i$ and assuming $g_{m_n}{r}_{o_n}\gg 1$, the transfer function of the FVF is shown in Equation (8).

$$FT\left(s\right)=\frac{i_o}{i_i}=\frac{g_{m_2}}{g_{m_1}}·\frac{1}{\frac{C_i{C}_a}{g_{m_1}{g}_{m_3}}{s}^2+\frac{C_a}{g_{m_1}}s+1}$$

(8)

Based on the dominant pole system approximation, Equation (8) leads to a DC current gain $A_i=g_{m_2}/g_{m_1}$ and a dominant pole location at ${\omega }_p=-g_{m_1}/C_a$. By substituting ${\omega }_p$ into Equation (7), the oscillation frequency and the minimum open-loop gain that sustain the oscillation of the proposed ring oscillator are defined in Equation (9). The last expression for $w_{osc}$ was obtained from Equation (2).

$${\omega }_{osc}=0.726\frac{g_{m_1}}{C_a}=\frac{0.726I_{D_1}}{\eta V_T{C}_a},A_{min}\ge 1.24$$

(9)

2.1.2. Voltage Buffer

A voltage buffer is used to transmit the $v_{osc}$ oscillation signal into the ASK backscatter modulator. The voltage buffer is designed to withstand the capacitive load $C_{i_{mod}}$ imposed by the input of the ASK backscatter modulator. Figure 4 depicts the implemented buffer whose design is intended to set the same propagation delay during low-to-high and high-to-low transitions [53].

2.2. Power Managment

The PM stage limits and regulates the $V_{REC}$ voltage provided by the HF section to power the temperature sensor. The PM is composed by a shunt regulator, a voltage/current reference, and an LDO voltage regulator (blue-dashed line box in Figure 1). The shunt circuit works as a coarse voltage regulator, keeping the $VDD$ voltage level below $2VDD$ by creating a current discharge path to ground. The voltage/current block provides a temperature-compensated $V_{REF}$ voltage, a temperature-compensated $I_{TC}$ current, and a PTAT $I_P$ current. The LDO uses the $V_{REF}$ voltage and $I_{TC}$ current to bias its circuitry while provides a stable DC voltage level $VD{D}_2$ against the current load transients generated by the temperature sensors and buffer of the LF stage.

2.2.1. Shunt Regulator

Figure 5 illustrates the implemented shunt regulator. This line regulator creates a current discharge path to ground $(I_1+I_2+I_3+I_4)$ to keep a constant $V_{DD}$ below a certain level. It also serves as over-voltage circuit protection. The mechanism starts once the $V_{REC}$ voltage provided by the HF stage reaches a certain $V_{D{D}_{TH}}$ voltage threshold. The operation of this circuit can be described in four regions: $V_{REC}\ll V_{D{D}_{TH}}$, $V_{REC}=V_{D{D}_{TH}}$, $V_{D{D}_{TH}}<V_{REC}<2V_{D{D}_{TH}}$, and $V_{REC}>2V_{D{D}_{TH}}$.

At $V_{REC}\ll V_{D{D}_{TH}}$ all transistors of the shunt regulator are in the cut-off region and the discharge currents $I_1-I_4$ must be in the order of pico-amperes because the reservoir capacitor of the power harvester system needs to store charge as fast as possible to supply the whole sensor. When $V_{REC}=V_{D{D}_{TH}}$ a discharge path is created by adding $I_1+I_3+I_4$. Under this scenario, all transistors that comprise the $I_1$, $I_3$ and $I_4$ branches must operate in the subthreshold region, allowing a current flow of just a few tens of nano-amperes, and transferring most of the charge collected by the power harvester to the next subsystems.

In the third case, $V_{D{D}_{TH}}<V_{REC}<2V_{D{D}_{TH}}$, the $m_1$, $m_5$ and $m_7$ transistors begin to operate in saturation region allowing a discharge current in the order of micro-amperes. At this point, $m_3$ begins to operate in the linear region. Finally, when $V_{REC}>2V_{D{D}_{TH}}$ all $m_1$ transistors operate in saturation mode while $m_3$, $m_5$ and $m_7$ operate in the linear region. This last scenario creates discharge currents in the order of tens to hundreds of micro-amperes, protecting the overall passive tag against over-voltage spikes.

2.2.2. Current and Voltage Reference

The current and voltage reference is made up by three building blocks: a current source core, a current reference, and a voltage reference. The current source core generates a PTAT $I_P$ current and a Complementary To Absolute Temperature (CTAT) $I_C$ current. The current reference delivers a temperature-compensated $I_{TC}$ current by adding the $I_P$ and $I_C$ currents into a current sink, while the voltage reference generates a temperature-compensated voltage.

Figure 6 shows the schematic circuit of the current source core, where all transistors operate in the subthreshold region, except for $m_3$ and $m_5$, which operate in the linear and saturation regions [54,55]. The $m_{p_3}$ transistors and $C_A$ are only used for start-up purposes.

The $I_P$ current in Figure 6 is computed by solving the mesh composed for the $m_1$, $m_2$, and $m_3$ transistors and substituting their gate-source voltage relation stated by Equation (2), which leads to Equation (10). Since $m_3$ operates in the linear region, its channel resistance can be expressed as $R_{D{S}_3}=1/\left[k_3\mu C_{ox}(V_A-V_{T{H}_3})\right]$. Equation (10) can be also replaced in the drain current equation of $m_3$ which is ruled by $I_P=V_{D{S}_3}/R_{D{S}_3}$, obtaining Equation (11).

$$V_{D{S}_3}=V_{G{S}_1}-V_{G{S}_2}=\eta V_{T}ln\left(\frac{k_2}{k_1}\right)+V_{T{H}_1}-V_{T{H}_2}$$

(10)

$$I_P=k_3\mu C_{ox}(V_A-V_{T{H}_3})\eta V_{T}ln\left(\frac{k_2}{k_1}\right)$$

(11)

With the current mirrors composed by $m_{p_1}-m_{p_2}$, the $I_p$ current expressed in Equation (11) can be copied three times and then sunk into the $m_5$ transistor that operates in the saturation region. In this case, the $m_5$ drain current is stated as $3I_p=k_5\frac{\mu C_{ox}}{2}{(V_A-V_{T{H}_5})}^2$. By substituting Equation (11) into the $m_5$ drain current, a second order equation can be found and solved for $V_A$, as shown in Equation (12). By replacing Equation (12) into Equation (11) and assuming $V_{T{H}_5}=V_{T{H}_3},$ a new expression for $I_P$ can be found as shown in Equation (13).

$$V_A=6\frac{k_3}{k_5}\eta V_{T}ln\left(\frac{k_2}{k_1}\right)+V_{T{H}_5}$$

(12)

$$I_P=\frac{k_5}{6}\mu C_{ox}{\left[6\frac{k_3}{k_5}\eta V_{T}ln\left(\frac{k_2}{k_1}\right)\right]}^2$$

(13)

In order to obtain a final expression for $I_p$, the temperature dependence of the electron mobility $\mu$ and the thermal voltage relation must be included. The behavior of $\mu$ as a function of the temperature is shown in Equation (14), where ${\mu }_{T_{nom}}$ is the electron mobility at nominal temperature, $T_{nom}$ is the nominal temperature, and m is a technological parameter. After replacing in Equation (14) the thermal voltage and rearranging terms, a more compact equation for $I_P$ can be obtained as shown in Equation (15). In this equation, $k_{rp}$ is a constant that depends on the aspect ratio of the transistors $m_1-m_2$ and $m_4-m_5$ while $k_{tp}$ is a constant that fully depends on the fabrication technology. Both constants are described in Equation (16). Equation (15) shows that a proportional temperature behavior is kept as long as $2+m>0$; the best scenario will occur at $2+m=1$ where Equation (15) is linearly dependent on temperature.

$$\mu \left(T\right)={\mu }_{T_{nom}}{\left[\frac{T}{T_{nom}}\right]}^{m}m<-1$$

(14)

$$I_P=12k_r{k}_t·T^{2+m}$$

(15)

$$k_{rp}=\frac{k_3^2}{k_5}ln\left(\frac{k_2}{k_1}\right),k_{tp}=\eta \frac{K}{q}\frac{{\mu }_{T_{nom}}{C}_{ox}}{T_{nom}^m}$$

(16)

The complementary current $I_C$, shown in Figure 6, is computed by solving the mesh composed for the $m_4-m_7$ transistors. Assuming $V_A=V_{G{S}_5}$ and substituting their gate-source voltage relation stated in Equation (2), it leads to Equation (17) for $V_B$. Due to the current mirrors composed for $m_{p1}-m_{p2}$ and $m_{n1}$, the $I_C$ current flows also through $m_{10}-m_{11}$ transistors. In this case, the drain current $I_{D_{11}}$ is equal to the $I_C$ current and can be expressed by Equation (18). Furthermore, a more compact representation of the $I_C$ can be obtained by substituting the gate-source voltages of the transistors $m_{12}$ and $m_{13}$ using Equation (2) and the $V_B$ voltage established in Equation (17) into Equation (18). The result is presented in Equation (19) where $\Delta V_{TH}=V_{T{H}_5}-V_{T{H}_{13}}+V_{T{H}_{12}}-V_{T{H}_{11}}$.

$$V_B=V_{T{H}_5}+\eta V_{T}ln\left[2\frac{k_4}{k_7}{\left(\frac{k_2}{k_1}\right)}^{\frac{6k_3}{k_5}}\right]$$

(17)

$$I_C=k_{11}{I}_o{e}^{\frac{V_B-V_{G{S}_{13}}+V_{G{S}_{12}}-V_{T{H}_{11}}}{\eta V_T}}$$

(18)

$$I_C=k_{11}{I}_o{e}^{\frac{\Delta V_{TH}}{\eta V_T}}\frac{2}{3}\frac{k_4}{k_7}\frac{k_{13}}{k_{12}}{\left(\frac{k_2}{k_1}\right)}^{\frac{6k_3}{k_5}}$$

(19)

A Taylor expansion of the exponential term can be applied to simplify Equation (19). This expansion is presented in Equation (20) up to the second term as the following values can be considered negligible. After substituting Equation (20) into Equation (19), a more insightful $I_C$ expression can be obtained as shown in Equation (21) where $k_{rc}$ is a constant that depends on the aspect ratio of the transistors $m_1-m_5$, $m_7$ and $m_{11}-m_{13}$, while $k_{tc}$ is a constant that fully depends on the fabrication technology; both constants are described in Equation (22). Equation (21) reveals that the $T^{1+m}$ term presents an inversely proportional behavior over temperature as long as $1+m<0$. On the other case, the $(\eta V_T+\Delta V_{TH})$ term shows a proportional temperature behavior, canceling the effect of the $T^{1+m}$ term. However, the $(\eta V_T+\Delta V_{TH})$ term presents an almost constant behavior, since $V_T$ increases as $\Delta V_{TH}$ decreases.

$$e^{\frac{\Delta V_{TH}}{\eta V_T}}\approx 1+\frac{\Delta V_{TH}}{\eta V_T}+\cdots$$

(20)

$$I_C=k_{rc}{k}_{tc}·(\eta V_T+\Delta V_{TH})·T^{1+m}$$

(21)

$$k_{rc}=\frac{2}{3}{k}_{11}\frac{k_4}{k_7}\frac{k_{13}}{k_{12}}{\left(\frac{k_2}{k_1}\right)}^{\frac{6k_3}{k_5}},k_{tc}=\left(\frac{\eta -1}{\eta }\right)\frac{K}{q}\frac{{\mu }_{T_{nom}}{C}_{ox}}{T_{nom}^m}$$

(22)

The schematic circuits of the current and voltage reference are shown in Figure 7. These circuits make use of the $V_{P{1}_p}$ and $V_{P{2}_p}$ bias voltages to mirror an $I_P$ current and use the $V_{P{1}_c}$ and $V_{P{2}_c}$ bias voltages to mirror an $I_C$ current. The bias voltages were generated in the current source core shown in Figure 6.

The current reference shown in Figure 7a provides a temperature-compensated current $I_{TC}$ by sinking the $I_P$ and $I_C$ currents into a $m_{14}$ diode connected transistor, creating a $V_{I_{TC}}$ voltage that will be used to bias further temperature-compensated current mirrors. The current reference provides a proportional-to-temperature current conveying the $I_P$ current into the $m_{15}$ diode connected transistor, which in turn generates a $V_{I_P}$ voltage that will be used to bias the current mirrors of the following stages.

The implemented voltage reference is drawn in Figure 7b. The voltage reference provides a stable $V_{REF}$ against temperature variation. This voltage can be computed by using the gate-source voltage mesh composed for $m_{16}$ and $m_{18}-m_{19}$ transistor as well as using the drain currents that flow through them as stated in Equation (23). A simplified version of Equation (23) is presented in Equation (24) where $\Delta V_{T{H}_{REF}}=V_{T{H}_{18}}-V_{T{H}_{16}}+V_{T{H}_{19}}$.

$$V_{REF}=V_{T{H}_{18}}+\eta V_{T}ln\left(\frac{2I_P-I_C}{k_{18}{I}_o}\right)-V_{T{H}_{16}}-\eta V_{T}ln\left(\frac{I_C}{k_{16}{I}_o}\right)+V_{T{H}_{19}}+\eta V_{T}ln\left(\frac{3I_P}{k_{19}{I}_o}\right)$$

(23)

$$V_{REF}=\Delta V_{T{H}_{REF}}+\eta V_{T}ln\left[\frac{1}{I_o}\frac{k_{16}}{k_{18}{k}_{19}}\frac{3I_P}{I_C}(2I_P-I_C)\right]$$

(24)

2.2.3. LDO Voltage Regulator

The schematic of the implemented LDO voltage regulator and its open-loop small-signal model are presented in Figure 8a,b, respectively. As shown in Figure 8a, the implemented LDO is made up of an error amplifier ($m_1,m_2,m_{ea}$ and $m_{n_1}$), a pass-element ($m_{pass}$), a feedback network ($m_3,m_4$), a load capacitor $C_L$, and a compensation capacitor $C_M$. The load current $I_L$ is modeled as an $R_L$ resistor. The implemented LDO uses the $V_{I_{TC}}$ and $V_{REF}$ bias voltages to improve its performance against temperature variation. All transistors operate in the subthreshold region.

Figure 8b presents the open-loop small-signal model of the LDO used to analyze its steady-state performace and transient stability. The open-loop small-signal model in Figure 8b is obtained by breaking the $v_{loop}$ node connected to the gate of the left $m_{ea}$ transistor in Figure 8a. After that, a $v_i$ voltage probe is applied into the gate of the left $m_{ea}$ transistor and the $v_{loop}\left(s\right)/v_i\left(s\right)$ transfer function is obtained [56]. In Figure 8b, the $g_{m_k}$, $r_{o_k}$, $C_{g{d}_k}$, $C_{g{s}_k}$, $C_{d{b}_k}$, and $C_{s{b}_k}$ are the transconductance, channel resistance, gate-drain capacitance, gate-source capacitance, drain-bulk capacitance, and source-bulk capacitance of the $k-th$ transistor, respectively. Moreover, the following assumptions were done in order to simplify the small-signal model: $R_A=r_{o_{ea}}\Vert [(1/g_{m_2})+r_{d{s}_1}]$, $R_O=r_{o_{pass}}\Vert [(1/g_{m_2})+(1/g_{m_4})]\Vert R_L$, $C_c=C_{g{d}_2}+C_{d{b}_2}+C_{g{d}_{ea}+C_{d{b}_{ea}}}+C_{g{s}_{pass}}$, and $C_{i_{ea}}=C_{g{d}_{ea}}+C_{g{s}_{ea}}+C_{d{b}_3}+C_{g{s}_4}+C_{d{b}_4}$. In addition, $g_{m_k}{r}_{o_k}\gg 1$, $C_C>C_{g{d}_{pass}}$, and $r_{o_k}\gg r_{d{s}_1}$. The resulting open-loop small-signal model is shown in Equation (25) where the DC open-loop gain $A_v$ is stated by Equation (26).

$$\frac{v_{loop}}{v_i}=A_v·\frac{\frac{C_C{C}_M}{g_{m_2}{g}_{m_{pass}}}{s}^2+\frac{C_M}{g_{m_2}}s+1}{C_C{C}_M{C}_L{r}_{d{s}_1}{R}_b{R}_o{s}^3+C_C(C_M+C_L)R_b{R}_o{s}^2+(C_M{r}_{d{s}_1}{g}_{m_{pass}}{R}_o+C_L{R}_o)s+1}$$

(25)

$$A_v=-g_{m_{ea}}{R}_B{g}_{m_{pass}}{R}_o\frac{R_4}{R_3+R_4}$$

(26)

As the LDO voltage regulator presents transitions between no-load, $I_L=0$, and full-load, $I_L=I_{L_{max}}$, both cases must be analyzed in order to establish the proper stability criteria. For no-load condition, the load current $I_L$ is equal or near to zero amperes causing a maximum open-loop DC gain as the pass-transistor operates in sub-threshold region. This scenario leads to a dominant pole and two split-apart non-dominant poles. The open-loop transfer function, pole locations, and gain-bandwidth product (GBW) are given by Equations (27)–(29), respectively.

$$F{T}_{NL}\left(s\right)\approx \frac{v_{loop}}{v_i}\approx A_v·\frac{\frac{C_C{C}_M}{g_{m_2}{g}_{m_{pass}}}{s}^2+\frac{C_M}{g_{m_2}}s+1}{C_C{C}_M{C}_L{r}_{d{s}_1}{R}_b{R}_o{s}^3+C_C(C_M+C_L)R_b{R}_o{s}^2+C_L{R}_{o}s+1}$$

(27)

$${\omega }_{p_{1_{NL}}}\approx -\frac{1}{C_L{R}_o},{\omega }_{p_{2_{NL}}}\approx -\frac{C_L}{C_C{R}_B(C_M+C_L)},{\omega }_{p_{3_{NL}}}\approx -\frac{C_M+C_L}{C_L{C}_M{r}_{d{s}_1}}$$

(28)

$$GB{W}_{NL}\approx \frac{g_{m_{ea}}{R}_B{g}_{m_{pass}}}{C_L}\frac{R_4}{R_3+R_4}$$

(29)

When a full-load condition occurs, the load current $I_L$ rises to its maximum value, forcing a drop in the open-loop DC gain as the pass-transistor operates in saturation region. This scenario generates a dominant pole and a pair of complex conjugated non-dominant poles. The open-loop transfer function, pole locations, and gain-bandwidth product (GBW) are given by Equations (30)–(32), respectively.

$$F{T}_{FL}\left(s\right)\approx \frac{v_{loop}}{v_i}\approx A_v·\frac{\frac{C_C{C}_M}{g_{m_2}{g}_{m_{pass}}}{s}^2+\frac{C_M}{g_{m_2}}s+1}{C_C{C}_M{C}_L{r}_{d{s}_1}{R}_b{R}_o{s}^3+C_C(C_M+C_L)R_b{R}_o{s}^2+C_M{r}_{d{s}_1}{g}_{m_{pass}}{R}_{o}s+1}$$

(30)

$${\omega }_{p_{1_{FL}}}\approx -\frac{1}{C_M{r}_{d{s}_1}{g}_{m_{pass}}{R}_o},{\omega }_{p_{{2,3}_{FL}}}\approx -\frac{1}{2r_{d{s}_1}}\frac{C_M+C_L}{C_M{C}_L}\pm j\sqrt{\frac{g_{m_{pass}}}{C_C{C}_L{R}_b}}$$

(31)

$$GB{W}_{FL}\approx \frac{g_{m_{ea}}{R}_B}{C_M{r}_{d{s}_1}}\frac{R_4}{R_3+R_4}$$

(32)

To ensure a good performance during steady-state line and load regulations, the open-loop gain in Equation (26) must be maximized. This is valid as the error amplifier and the pass transistor operates in the subthreshold region, enabling a voltage gain larger than 40 dB and 20 dB, respectively. The non-dominant poles ${\omega }_{p_{2_{NL}}}$ and ${\omega }_{p_{3_{NL}}}$ should be placed at higher frequencies than $GB{W}_{NL}$ and the ${\omega }_{p_{1_{FL}}}$ shall be set to achieve the required bandwidth during the full-load condition.

2.3. High Frequency (HF) Section

The HF section is used to harvest the electromagnetic energy available in the environment as well as transmit the temperature data using ASK backscatter modulation. This section is composed of a dipole antenna, a matching network, a three-stage differential rectifier, and an ASK backscatter modulator. The dipole antenna generates a differential time-variant voltage $v_{ASK\pm }$ between its terminals, while the matching network is used to transfer the maximum gathered power from the antenna into the differential power harvester. The three-stage differential rectifier extracts a non-regulated $V_{REC}$ DC voltage from the $v_{RF\pm }$ voltage that is used to supply all the on-chip circuitry. The ASK backscatter modulator is used to transmit the temperature data using a backscatter technique. The block diagram of the HF section is shown in the black-dashed line box in Figure 1 while its schematic circuit is re-drawn in Figure 9.

2.3.1. RF Differential Rectifier

The RF to DC conversion is implemented using a three-stage differential rectifier shown in Figure 9. The output DC voltage $V_{REC}$ is given by Equation (33), where $P_{av}$ is the RF available power, ${\eta }_A$ is the antenna radiation efficiency, N is the number of differential rectifier stages, $R_{rec}$ is the real part of the input impedance of a one-stage differential rectifier, and $X_{rec}$ is the imaginary part of the input impedance of a one-stage rectifier cell [57,58].

$$V_{REC}=\sqrt{\frac{2P_{av}{\eta }_{A}N}{R_{rec}}}{X}_{rec}$$

(33)

The input impedance $Z_{REC}$ of the three-stage differential rectifier is given by Equation (34), where $C_x=C_{g{s}_1}+C_{s{b}_1}{C}_{g{s}_2}+C_{s{b}_2}+C_{c_p}$, $C_{c_p}$ is the parasitic capacitance of the lower plate in $C_c$, $R_{DS}$ is the drain-source resistance of $m_{1,2}$ transistors whose value depends on whether the transistor operates in the subthreshold, linear, or saturation region, and $R_o$ which is the ratio between the output voltage and current of one rectifier cell. The value of the input impedance $Z_{REC}$ must match the antenna impedance to ensure the maximum power transfer.

$$Z_{REC}=\frac{1}{3}[R_{rec}-j{X}_{rec}]=\frac{1}{3}\left[\frac{(1+\frac{C_x}{C_c})(R_{DS}+R_o)}{\omega C_x{(R_{DS}+R_o)}^2+1}-j\frac{\omega C_x(1+\frac{C_x}{C_c}){(R_{DS}+R_o)}^2}{\omega C_x{(R_{DS}+R_o)}^2+1}\right]$$

(34)

2.3.2. Matching Network

The used matching network is shown in Figure 9. As the matching network is connected with the antenna through an off-chip bonding wire and an on-chip pad, their inductance $L_{bond}$ and capacitance $C_{pad}$ must be included and used for matching purposes. The matching network includes an on-chip inductor L and a parasitic capacitance $C_{par}$ that models the capacitance provided by the ASK backscatter modulator and the interconnection lines.

To obtain the maximum power transfer condition between the antenna and the differential rectifier, Equation (35) must be fulfilled. After solving Equation (35) for the antenna impedance $Z_a$, the real $R_a$ and imaginary $X_a$ part of the antenna can be computed in Equation (36).

$$\frac{\partial P\left(Z_{REC}\right)}{\partial Z_{REC}}=\frac{\partial \left(\frac{V_{RF}^2}{Z_{REC}}\right)}{\partial Z_{REC}}=0$$

(35)

$$\begin{array}{ccc}\hfill Z_a& =& R_a+j{X}_a\hfill \\ & R_a& =\frac{3Z_{REC}(1+{\omega }^2{C}_{pad}L)}{{\left(3Z_{REC}\right)}^2+{\left[\omega (C_{pad}+C_{par})\right]}^2}\hfill \\ & X_a& =\frac{\omega \left\{(C_{pad}+C_{par})\left[1-{\omega }^2[(C_{pad}+C_{par})L_{bond}+C_{par}L]\right]-{\left(3Z_{REC}\right)}^2(L+L_{bond})\right\}}{{\left(3Z_{REC}\right)}^2+{\left[\omega (C_{pad}+C_{par})\right]}^2}\hfill \end{array}$$

(36)

2.3.3. Dipole Antenna

Figure 10 shows the shape of the inductive coupling dipole antenna used by the proposed passive tag temperature sensor. The antenna impedance $Z_a$ is expressed in Equation (37) where $R_a$ and $X_a$ are the real and imaginary part of the antenna impedance, $f_o$ is the central operation frequency, $R_{r{b}_o}$ is the resistance of the radiation body, $L_{loop}$ is the inductance of the loop, and M is the coupling factor between the radiation body and the loop. Because of the nature of $Z_a$, the electrical model of the antenna can be split as shown in Figure 9.

$$Z_a=R_a+j{X}_a=\frac{{\left(2\pi f_{o}M\right)}^2}{R_{r{b}_o}}+j2\pi f_o{L}_{loop}$$

(37)

It can be noted in Equation (37) that the real part of the antenna impedance can be easily controlled by decreasing the coupling factor M. Hence, the separation distance between the loop and the radiating body may be increased. Furthermore, the size of the loop governs the imaginary part.

2.3.4. ASK Backscatter Modulator

The implemented ASK backscatter modulator is depicted in Figure 9. It is made up by two NMOS transistors $m_3$; both transistors act as an open–close switches. Based on Equation (34), during the open state the drain-source resistance must accomplish $R_{DS}\ge 20R_{rec}$ in order to enable a maximum power transfer into the differential rectifier, and no power is reflected into the antenna. During the close state, the drain-source resistance must accomplish $R_{DS}=0.5R_{rec}$ to unmatch the differential rectifier with the antenna by a 0.5x factor, allowing a reflected power into the antenna. The frequency of the reflected and non-reflected power into the antenna contains the sensed temperature. This frequency creates two lateral sidebands located at $f_{ask}\pm f_{osc}$.

3. Design Methodology, Layout and Circuit Simulation

This section presents the design methodology used in the proposed self-powered temperature sensor prototype. In addition, the layout and post-layout simulation for each circuit is reported.

3.1. Design Methodology

Figure 11 presents the bottom-up design flow used to implement the proposed battery-free temperature sensor prototype which is organized as follows. All circuits are grouped in two main domains, a low-frequency section and a high-frequency section. Each domain includes three columns, where the center column points out the circuit to be designed, the left column indicates the required variables to design the aforementioned circuit, and the right column maps a new set of variables that can be used by further circuits.

Based on Figure 11, the low-frequency section is firstly designed to determine the total amount of required energy to power the passive tag. It starts with the voltage/current reference circuit and ends with the LDO Regulator circuit. After that, the high-frequency section is outlined to provide such required energy. It starts with the design of the Differential Rectifier circuit and ends with the ASK backscatter modulator.

3.2. Layout and Circuit Simulation

In this section, the layout, transistor dimensions, and post-layout simulations for each one of the circuits of the proposed battery-free temperature sensor prototype are presented to validate their functionality and performance. The sizes of the transistors were computed based on the operation region described in Section 2 as well as using Equations (2), (4) and (6).

3.2.1. Current and Voltage Reference

Figure 12 shows the location of the current/voltage reference circuit inside the microphotography of the whole self-powered tag. Furthermore, a zoomed-in view of its layout is included. The silicon area consumption of the current/voltage reference is 280 µm × 220 µm. The $I_P$ and $I_C$ are set to 50 nA, $I_{TC}$ is set to 100 nA, and $V_{REF}$ is set to 400 mV. The dimensions of the transistors that compose the current source core, the current reference, and the voltage reference are listed in

Table 1. Elements and transistor sizes of the current source core.

Element	Value	Element	Value	Element	Value
$m_{p_1}$	(23.005 µm/1.8 µm) × 6	$m_4$	(1.8 µm/1.255 µm)	$m_{10-11}$	(3.665 µm/18 µm) × 5
$m_{p_2}$	(23.005 µm/1.8 µm) × 8	$m_5$	(1.8 µm/8.52 µm)	$m_{12}$	(24.18 µm/14 µm) × 14
$m_{p_3}$	(1.8 µm /0.9 µm) × 4	$m_6$	(5.4 µm/1.98 µm) × 14	$m_{13}$	(2.75 µm/14 µm) × 14
$m_1$	(13.835 µm/1.8 µm) × 4	$m_7$	(5.4 µm/1.885 µm)	$m_{n_1}$	(8.895 µm/1.8 µm) × 8
$m_2$	(13.835 µm/1.8 µm) × 12	$m_8$	(46.16 µm/0.9 µm) × 40	$m_{n_2}$	(23.14 µm/1.8 µm) × 14
$m_3$	(1.8 µm/15.395 µm)	$m_9$	(5.4 µm/1.9 µm)	$C_A$	1.27 pF
				$C_B$	0.5 pF

,

Table 2. Elements and transistor sizes of the current reference.

Element	Value	Element	Value	Element	Value
$m_{p_1}$	(23.005 µm/1.8 µm) × 6	$m_{n_1}$	(8.895 µm/1.8 µm) × 8	$m_{15}$	(13.835 µm/1.8 µm) × 4
$m_{p_2}$	(23.005 µm/1.8 µm) × 8	$m_{14}$	(13.835 µm/1.8 µm)

and

Table 3. Elements and transistor sizes of the voltage reference.

Element	Value	Element	Value	Element	Value
$m_{p_1}$	(23.005 µm/1.8 µm) × 6	$m_{n_1}$	(8.895 µm/1.8 µm) × 8	$m_{16-18}$	(2.18 µm/9 µm) × 4
$m_{p_2}$	(23.005 µm/1.8 µm) × 8	$m_1$	(13.835 µm/1.8 µm) × 4	$m_{19}$	(3.4 µm/18 µm)
$C_E$	1.6 pF

, respectively.

The DC, transient response, and temperature characterizations of the current/voltage reference are shown in Figure 13. Based on Figure 13a,d, it can be noted that the $I_C$, $I_P$, $I_{TC}$, and $V_{REF}$ reach their constant value at $V_{DD}=0.8\mathrm{V}$. However, as $V_{DD}$ comes from the shunt regulator and some voltage ripples may be bypassed, $V_{DD}$ is set to 0.9 V for safeguard purposes. Figure 13b,e show that the start-up time of all the supplied voltage and currents is 3.5 ms. Figure 13c,f show the temperature characterization for the $I_C$, $I_P$, $I_{TC}$, and $V_{REF}$ parameters. The $I_{TC}$ current presents a 295.23 ppm/°C temperature coefficient and $V_{REF}$ exhibit a 364.28 ppm/°C temperature coefficient, both over a −40 °C to 60 °C range. The power consumption of this block is 675 nW, sinking a total current $I_{T1}=750$ nA using a voltage supply $V_{DD}=0.9$ V.

3.2.2. Temperature Sensor and Voltage Buffer

Figure 14 shows the location of the proposed temperature sensor inside the microphotography of the whole self-powered tag. In addition, a zoomed-in view of its layout is included. Its used silicon area is 170 µm × 175 µm. The oscillation frequency was set at 250 kHz for a temperature of 25 °C. The dimensions of the transistors that compose the temperature sensor are listed in

Table 4. Elements and transistor sizes of the temperature sensor.

Element	Value	Element	Value	Element	Value
$m_{p_1}$	(6.24 µm/1.8 µm) × 8	$m_1,m_4$	(3.265 µm/3.6 µm) × 4	$m_3$	(7.19 µm/3.6 µm) × 4
$m_{n_1}$	(16 µm/1.8 µm) × 8	$m_2$	(3.265 µm/3.6 µm) × 6	$m_5,m_6$	(0.9 µm/0.36 µm)

.

The post-layout transient response simulation is drawn in Figure 15a, where an oscillation frequency $f_{osc}=$ 210 kHz at 25 °C can be noticed. Figure 15b shows a positive dependence of the oscillation frequency $f_{osc}$ on temperature. The temperature sensitivity of the sensor is 858.46 Hz/°C with a standard error of 6.46 Hz/°C over −40 °C to 60 °C. The power consumption of this block is 852 nW, sinking a total current $I_{T2}+I_{T3}=1.42$ µA for a voltage supply of $V_{D{D}_2}=0.6$ V.

3.2.3. LDO

Figure 16 shows the location of the LDO voltage regulator inside the microphotography of the whole self-powered tag. Moreover, a zoomed-in view of its layout is included. The silicon area consumption of this circuit is 220 µm × 105 µm. The LDO is designed to deliver an output voltage of $V_{D{D}_2}=0.6\mathrm{V}$ and an output current of $I_L=2.5$ µA using a voltage supply of $V_{DD}=0.9$ V. The element values and transistor dimensions that compose the LDO are listed in

Table 5. Elements and transistor sizes of the LDO voltage regulator.

Element	Value	Element	Value	Element	Value
$m_1$	(4.12 µm/1.8 µm) × 1	$m_{n_1}$	(13.835 µm/1.8 µm) × 8	$m_4$	(5.355 µm/18 µm) × 4
$m_2$	(4.12 µm/1.8 µm) × 3	$m_{pass}$	(12.815 µm/4.5 µm) × 4	$C_M$	2.5 pF
$m_{ea}$	(3.085 µm /1.8 µm) × 4	$m_3$	(32.99 µm/1.5 µm) × 40	$C_L$	10 pF

.

Figure 17 depicts the post-layout simulations where the behavior of the LDO output voltage $V_{DD2}$ is observed. Figure 17a shows the line regulation characterization where the input voltage $V_{DD}$ is swept from 1 V to 1.8 V and the load current is set under no-load, $I_L=0.1$µA, and full-load, $I_L=2.5$µA, conditions. The reported line regulation during no-load and full-load are 125 µV/V and 375 µV/V, respectively. Figure 17b illustrates the load regulation characterization where the load current $I_L$ is swept from 0 µA to 2.5 µA and $V_{DD}=0.9$ V. The reported load regulation is 360 µV/µA. Line and load regulation report excellent steady-state performance due to the open-loop gain of the LDO exhibits a large voltage gain ≥60 dB. Finally, Figure 17c shows the dynamic load regulation characterization where a current square wave of 0 µA to 2.5 µA amplitude and 25 kHz frequency is applied. The load regulation during low-to-high current transients is 62 mV/µA, while during high-to-low current transients it is 23 mV/µA. The power consumption of this block is 180 nW, sinking a quiescent current of 200 nA using a voltage supply $V_{DD}=0.9$ V.

3.2.4. Shunt Regulator

Figure 18 shows the location of the implemented shunt regulator inside the microphotography of the whole self-powered tag. Moreover, a zoomed-in view of its layout is included. The required silicon area is 115 µm × 90 µm. This circuit was designed to deliver a regulated output voltage of $V_{DD}=1$ V when $V_{REC}=1.2$ V, showing a discharge current of $I_{LIM}=560$ nA and allowing a deliverable current $I_{VDD}=5$ µA. The dimensions of the transistors of the shunt regulator are listed in

Table 6. Elements and transistor sizes of the shunt regulator.

Element	Value	Element	Value	Element	Value
$m_1$	(11.2 µm/1.8 µm) × 25	$m_4$	(7.82 µm/45 µm) × 4	$m_7$	(7.59 µm/1.8 µm) × 10
$m_2$	(3.62 µm/4.5 µm) × 4	$m_5$	(1.375 µm/18 µm) × 2	$R_1$	25 $K\mathrm{\Omega }$
$m_3$	(0.9 µm/45 µm)	$m_6$	(12.315 µm/4.5 µm) × 4

.

The post-layout simulation response of the shunt regulator is shown in Figure 19. The output voltage $V_{DD}$ is presented in Figure 19a, while the consumed and deliverable current $I_{LIM}$ and $I_{VDD}$ are depicted in Figure 19b. It can be noted from Figure 19a that the maximum output voltage is $V_{DD}=1.45$ V for a maximum output current of $I_{VDD}=6.7$µA when $V_{REC}=1.8$ V. For $V_{REC}\ge 2.4$ V the magnitude of the current discharge path is $I_{LIM}\ge 80$µA, adjusting the output voltage to no more than 1.1 V.

3.2.5. Power Harvester, Matching Network, and ASK Backscatter Modulator

Figure 20 shows the location of the implemented power harvester, matching network, and ASK backscatter modulator inside the microphotography of the whole self-powered tag. Moreover, a zoomed-in view of its layout is included. The required silicon area is 775 µm × 550 µm.

The transistors dimensions and elements values that compose the power harvester and the matching network are listed in

Table 7. Elements and transistor sizes of the power harvester circuit.

Element	Value	Element	Value	Element	Value	Element	Value
$m_1$	(1.5 µm/0.18 µm) × 8	$L_{bond}$	1.5 nH $@1\mathrm{\Omega }$	L	4.18 nH	$C_L$	150 pF
$m_2$	(1.5 µm/0.18 µm) × 4	$C_{pad}$	0.5 pF	$C_C$	2.1 pF

. These sizes were obtained considering some design constraints. First, the power harvester is designed to provide a DC output voltage $V_{REC}$ and a $I_L$ current of 1.1 V and 5.5 µA. Second, the bonding wire shows an average parasitic inductance and resistance of 1.5 nH and $1\mathrm{\Omega }$; the parasitic capacitance of the bonding pad is 0.5 pF. Both elements cannot be modified as they are dependent on the used technology. Third, the values of the L on-chip inductors for RF purposes are set by the fabrication process, and the $C_L$ is fixed to 150 pF because it serves as a reservoir capacitor.

Figure 21a,b report the harmonic balance simulations used to tune the power harvester while Figure 21c shows its transient post-layout simulation. All simulations were carried using a 910 MHz frequency. Figure 21a shows the swept of $W_1$ and $W_2$ transistor widths to achieve an output voltage $V_{REC}$ = 1.2 V by means of a 250 mV, 275 mV and 300 mV $v_{ask}$ RF input voltage. The number of fingers of the NMOS and PMOS were fixed to four and eight, respectively. This simulation shows that a minimum $v_{ask}=300$ mV is required to reach $V_{REC}$ = 1.2 V as long as $W_1$ and $W_2$ are set to $1.5$ µm. Figure 21b depicts a sweep in the impedance port that excites the harvester. This simulation was used to find out the value of the real $R_i$ and imaginary $X_i$ part that ensures the maximum power transfer. From Figure 21b, it can be observed that the input impedance of the differential rectifier at −8.96 dBm of input power is $Z_{REC}=175.8\mathrm{\Omega }+j236\mathrm{\Omega }$. Figure 21c presents the post-layout transient response of the differential rectifier exhibiting a start-up time of 30 µs. Figure 21d reports the Power Conversion Efficiency (PCE) of the RF power harvester, where three rectifier stages are used (N = 3) and the sizes of $m_1$ and $m_2$ are (1.5 µm/0.18 µm) × 8 and (1.5 µm/0.18 µm) × 4, respectively.

The sizes of the transistors that compose the ASK backscatter modulator are ${(W/L)}_{m3}$ = 4 µm/0.5 µm with a number of fingers equal to $nf=4$. Figure 22 shows how the backscatter modulator reflects −1.5 dB of input power when a digital “1” is applied to its input. This unmatched power is reflected back into the antenna and it is further radiated back to the RF source.

3.2.6. Dipole Antenna

The layout of the implemented inductive coupling dipole antenna is shown in Figure 23. It was simulated using an FR4 substrate with a 1.6 mm thickness, a relative permittivity ${ϵ}_r=4.6$, and a loss-tangent of $tan\delta =0.01$. The copper foil presents a thickness of 35 µm and a conductivity of $\sigma =5.7\times {10}^7$ S/m. The dimensions in Figure 23 are shown in

Table 8. Parameters of the dipole antenna.

Element	Value	Element	Value	Element	Value	Element	Value	Element	Value
$A_d$	79.4 mm	$A_i$	30 mm	$L_{d1}$	4 mm	$L_i$	11 mm	$S_{Y_{rb-l}}$	0.4 mm
$A_{d1}$	7.7 mm	$A_{i1}$	3 mm	$L_{d2}$	5 mm	$L_{i1}$	1 mm
$A_{d2}$	21.7 mm	$L_d$	14 mm	$L_{d_3}$	1 mm	$S_{X_{rb-l}}$	3 mm

. The $S_{X_{rb-l}}$ and $S_{Y_{rb-l}}$ parameters indicate the separation distance between the radiating body and the inductive loop over the x-axis and the y-axis.

Figure 24 shows the frequency response and radiation pattern of the antenna. Figure 24a depicts the S11 reflection coefficient response, where the impedance of the stimulus port was set to $Z_{REC}=175.8\mathrm{\Omega }-j236\mathrm{\Omega }$ to quantify the matching value at a center frequency of 910 MHz. The S11 values at 860 MHz, 910 MHz, and 960 MHz are −5.33 dB, −79.49 dB, and −4.645 dB, respectively. Figure 24b indicates that the antenna impedance is $149\mathrm{\Omega }+j450\mathrm{\Omega }$ at 860 MHz, $175\mathrm{\Omega }+j236\mathrm{\Omega }$ at 910 MHz, and $50\mathrm{\Omega }+j290\mathrm{\Omega }$ at 960 MHz. Figure 24c draws the radiation pattern.

4. Measurements and Results

To validate the functionality of the self-powered temperature sensor, a prototype was fabricated in a 0.18 µm CMOS standard technology provided by Silterra. The microphotograph of the chip that contains the proposed self-powered sensor is shown in Figure 25. The yellow box highlights a silicon area consumption of 1065 µm × 560 µm. The measurements and characterizations of the prototype were performed for the LF section, HF section, and the whole system.

4.1. Low-Frequency Section Measurements

To perform the characterization of the LF section, the prototype chip was attached into a Printed Circuit Board (PCB) shown in Figure 26. As the LF section includes the temperature sensor, the welded elements on the PCB and the PCB itself must withstand temperature variations in the range of 0 °C to 60 °C without modifying their electrical parameters. For this reason, the PCB was manufactured using a FR4 substrate that has an operating temperature range of −65 °C to 160 °C. Moreover, all the welded connectors are Tyco Electronics 1-1337445-0 BNCs, whose operating temperature range is −65 °C to 160 °C. In the same way, several RG142B coaxial cables were used, which support an operating temperature range of −70 °C to 200 °C.

Figure 27 presents the test-bench used to characterize the temperature dependence of the current $I_{TC}$, the voltage reference $V_{REF}$, and the oscillation frequency $f_{osc}$. The BK Precision 1672 power supply is used to energize the LF section by applying a 1.2 V voltage at the $V_{D{D}_2}$ input, generating $V_{REF}$ and $f_{osc}$. The power supply is also used to bias at $V_{TC}=0.2$ V an on-chip 10x current mirror that sinks a temperature-compensated current $I_{TC}$. An 8808A-Fluke precision multimeter was used to measure the temperature-compensated current $I_{TC}$, while a TBS-1022 Tektronix oscilloscope was employed to monitor the voltage reference $V_{REF}$ and the oscillation frequency $f_{osc}$. As shown in Figure 27, the PCB was placed inside a Russells G-Series temperature chamber where the temperature was swept from 0 °C to 65 °C in 1 °C steps.

Figure 28 shows similar results between the simulations and measurements of the temperature-compensated current source $I_{TC}$, the voltage reference $V_{REF}$, and the oscillation frequency $f_{osc}$. Furthermore, Monte Carlo simulations for 1000 samples are included. Figure 28a shows a measured $I_{TC}$ temperature coefficient of 383.33 ppm/°C while the simulation presented a temperature coefficient of 350 ppm/°C. Figure 28b depicts a $V_{REF}$ measured 400 ppm/°C temperature coefficient versus a 341.66 ppm/°C simulated temperature coefficient. The simulated frequency response shows a sensitivity of 823.29 Hz/°C, while the measurement exhibits a 831.53 Hz/°C sensitivity as illustrated in Figure 28c. Figure 28c presents the maximum and minimum values obtained from a 1000 samples Monte Carlo simulation for 10 °C, 20 °C, 30 °C, 40 °C, and 50 °C temperatures. The Monte Carlo histograms for 10 °C, 30 °C, and 50 °C are also included.

4.2. Rf Power Harvester Measurements

Figure 29 shows the fully assembled self-powered temperature sensor where the prototype chip was attached to the antenna by means of an epoxy resin. The final prototype presents an overall dimensions of 8 cm × 2.5 cm.

In order to measure the capability of the tag to harvest RF power and convert it into a DC power, the setup depicted in Figure 30a was implemented. The E4425B ESG-AP Series 3 GHz RF generator is used to provide an 910 MHz RF signal that is divided in two RF paths by an RF splitter. One path is used to irradiate the RF power through three RF adapters, a RG142B/U coaxial cable, and a 2000-1035-R Anritsu antenna. Likewise, the second path is employed to visualize the RF signal by means of two RF adapters, a RG142B/U coaxial cable, and a 54833B Infiniium oscilloscope.

Figure 30b reports the transient measurement response where the yellow and green traces correspond to the RF input signal and the DC harvested power, respectively. It can be noted that the harvested start-up time is about 300 µs because the RF generator start-up time affects this measurement. A $V_{REC}=0.9$ V DC output voltage is also generated when a $v_{ask}=0.4\mathrm{V}$ RF input voltage is applied. The $V_{REC}=0.9\mathrm{V}$ DC output voltage represents an output power of 5.5 µW, where 4.5 µW are transferred into the low-frequency section of the proposed sensor, while 1 µW is drained into the oscilloscope test probe.

4.3. Read Range Characterization

The read range characterization of the proposed self-powered temperature sensor prototype was done using the setup depicted in Figure 31. The E4425B ESG-AP Series 3 GHz RF generator along with five RF adapters, a RG142B/U coaxial cable, and a 2000-1035-R Anritsu antenna were used to provide the RF link. The temperature sensor was separated from the antenna at a distance r = 2.54 m. This separation corresponds to the maximum separation distance in which the sensor would turn on. To read the backscatter ASK modulated signal generated by the sensor, a DSAV048A Infiniium V-Series 8 GHz oscilloscope, two RF adapters, and a RG142B/U coaxial cable were used.

To quantify the radiated power $P_{Tx}$ the Equation (38) must be evaluated where $P_{G_{Tx}}$ is the E4425B RF generator output power (20 dBm), $I_{L_{RF-A}}$ is the insertion loss (0.1 dB) of the n RF adapters (5), and $I_{L_{CABLE}}$ is the insertion loss of the RG142B/U coaxial cable (1.329 dB). The radiated power is 18.171 dBm or 65.62 mW.

$$P_{Tx}=P_{G_{Tx}}-n·I_{L_{RF-A}}-I_{L_{CABLE}}$$

(38)

The separation distance between the self-powered sensor and the RF transmitter can be computed by Equation (39), where $\lambda$ is the 910 MHz wavelength, $P_{T_x}=18.171$ dBm according to Equation (38), $G_{T_x}=4.6$ dBi is the 2000-1035-R Anritsu transmitter antenna gain, $G_{R_x}=1.543$ dBi is the self-powered sensor antenna gain, $P_C=5.5$ µW is the self-powered sensor power consumption, $\mathrm{\Gamma }$ is the reflection coefficient between the temperature sensor antenna and the temperature sensor rectifier, and $PCE$ is the Power Conversion Efficiency of the rectifier.

$$r=\frac{\lambda }{4\pi }\sqrt{\frac{P_{Tx}{G}_{Tx}{G}_{R_x}}{2P_C}(1-|\mathrm{\Gamma }\left|\right)·PCE}$$

(39)

Figure 32a presents the read range calculation based on the previous parameters where $\mathrm{\Gamma }$ and $PCE$ were swept from 0 to 1; the read range is depicted in colored contour lines. As the measured read range distance is $r=2.54$ m, it can be inferred that the reflection coefficient and the power conversion efficiency are in the ranges of $0<\mathrm{\Gamma }<0.6$ and a $0.4<PCE<1$. A power consumption of 13.75 µW and a power efficiency of 10.92% were also found. This increment in the chip power consumption is due to errors in the antenna-chip bonding wire welding process.

The setup was performed using an irradiated power of 65.62 mW. Assuming a $P_{Tx}=1W$, Equation (39) cab be re-evaluated obtaining Figure 32b. By setting a range of $0<\mathrm{\Gamma }<0.6$ and a $0.4<PCE<1$, it can be extrapolated that the worst read range of the proposed self-powered temperature sensor is 9.5 m.

As stated at the beginning of this section, the ASK backscatter modulated signal generated by the sensor was measured by a DSAV048A Infiniium V-Series 8 GHz oscilloscope with the aim of a 2000-1200-R Anritsu antenna. The sensor prototype was exposed in a free environment to an external temperature source. Figure 33 presents how the temperature sensor generates lateral sidebands around a 910 MHz RF carrier, 910 MHz $\pm f_{osc}$. The location of these lateral sidebands corresponds with the temperature applied into the surface of the self-powered sensor. Figure 33a shows a lateral sideband of 910.217 MHz corresponding to a temperature of 35.75 °C. Figure 33b depicts a lateral sideband of 910.237 MHz that is related to a temperature of 62.5 °C, and Figure 33c draws a lateral sideband of 910.244 MHz that corresponds to a temperature of 72 °C. Figure 34 shows a summary of the measured lateral sidebands minus 910 MHz, showing the correct operation of the proposed temperature sensor and validating theory and simulations versus post-fabrication measurements.

Table 9. Comparison with previous works.

	[43]	[44]	[49]	[41]	[50]	[47]	[48]	[42]	[51]	[52]	This Work
Technology	0.35 µm	0.35 µm	0.25 µm	0.18 µm	0.18 µm	0.18 µm	0.18 µm	0.13 µm	0.13µm	65 nm	0.18 µm
	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Chip area	2.2 × 1.8 mm${}^2$	1 × 4 mm${}^2$	1.2 mm${}^2$	–	1.2 × 2.2 mm${}^2$	1.2 × 1.2 mm${}^2$	0.9 × 1.1 mm${}^2$	0.23 mm${}^2$	0.34 mm${}^2$	1.16 × 0.94 mm${}^2$	1.06 × 0.56 mm${}^2$
Full sensor	–	1 × 4 mm${}^2$	–	13 × 12 cm${}^2$	5.6 × 5.0 cm${}^2$	2.5 × 0.9 cm${}^2$	–	–	–	1910 × 940 µm${}^2$	8 × 2.5 cm${}^2$
area **
Wirelessly powered	YES	NO	YES	YES	YES	YES	YES	YES	YES	YES	YES
Incident signal	860 MHz	2.5 GHz	450 MHz	915 MHz	13.56 MHz	920 MHz	902–928 MHz	915 MHz	900 MHz	79 GHz	910 MHz
frequency
Wireless sensitivity	–	–	−12.3 dBm	–	−18.2 dBm	−12.3 dBm	−11 dBm	−16 dBm	−10 dBm	5 dBm	−8.99 dBm
Circuitry power	16.85 µW ***	–	2.75 mW	–	1.5 µW	–	2 µW	1.05 µW	8.5 µW	700 µW	13.75 µW
consumption
Temperature	35 ∼ 45	20 ∼ 90	−40 ∼ 40	−30 ∼ 70	0 ∼ 100	−25 ∼ 120	0 ∼ 100	10 ∼ 100	35 ∼ 42	32 ∼ 80	0 ∼ 60
range (${}^{\circ }$C)
Temperature	–	19.1 mV/${}^{\circ }$C	−300 kHz/°C	0.15 ${}^{\circ }$C/LSB	−666 kHz/${}^{\circ }$C	0.17 °C/LSB	26 kHz/${}^{\circ }$C	*	–	−22 MHz/${}^{\circ }$C	823.29 Hz/${}^{\circ }$C
sensitivity
Reader radiated	2 W	–	7 W	1 W	–	4 W	–	4 W	–	–	1 W
power (EIRP)
Read range (m)	2	–	18.3	0.5	–	3.4	–	10.4	–	–	9.5
Tag-to-reader	Backscatter	2.5 GHz OOK	2.3 GHz	–	402 MHz OOK	Backscatter	Backscatter	ASK	OOK	79.1 GHz burst	ASK
transmission		transmitter	transmitter		backscatter			backscatter	backscatter	transmitter	backscatter
Communication	EPC	Own	Not	EPC	Not	EPC	EPC	Not	Not	Not	Not
protocol	Gen 2	protocol	implemented	Gen 2	implemented	Gen 2	Gen 2	implemented	implemented	Implemented	implemented

^– Not specified. * Sensitivity presents a large variation in different temperature ranges. ** Overall dimensions of the sensor includes the CMOS chip and the antenna. *** Estimated by adding the power consumption of each reported blocks (if available).

compares the results obtained on the self-powered UHF passive tag proposed prototype for biomedical temperature monitoring with some state-of-art works. It can be noted that the proposed sensor presents a smaller chip area than [41,43,44,47,48,49,50,52] but shows a larger area than [42,51]. In order to compare the whole sensor area, including the antenna and the chip, the frequency of the RF-link must be taken into account as this frequency rules the size of the antenna; the higher the operating frequency, the smaller the antenna size. Thus, only sensors operating in the 860–960 MHz range will be compared. Under this consideration, the designed sensor is almost 8x smaller compared with [41] but it is almost 8x times larger than [47]. However the read range of these works is smaller and requires a greater amount of radiated power by the reader.

Furthermore, Table 9 shows that the proposed work does not exhibits the best wireless sensitivity among the other related works. However, two factors must be taken into account to address this parameter. First, Refs. [49,50] use two RF-links: one RF-link is specially dedicated for energy harvesting and the other is used for data transmission. This strategy means that there are no time gaps in which there is no RF energy or the amount of the RF energy may be reduced due to backscatter modulation. Likewise, Refs. [42,51] also present lower wireless sensitivities than the proposed sensor. Nevertheless, these two works were implemented in more advanced and smaller CMOS technologies which have transistors with lower threshold voltages, reducing the level of the minimum input voltage in which the RF power harvester would turn-on. Thus, the proposed self-powered sensor presents a well balanced trade-off between its performance using only one RF-link and CMOS fabrication process.

4.4. Overall Discussions

This work presents the design of a self-powered RF sensor prototype which allows measuring biomedical temperature signals from 0 °C to 60 °C with a sensitivity of 823.29 Hz/°C, Figure 34. It exhibits a read range of 9.5 m and presents overall dimensions of 8 cm × 2 cm, including the silicon die chip and the dipole antenna. The proposed temperature sensor is composed of a High-Frequency section, a Power-Managment stage, and a Low-Frequency section.

The HF section is designed for RF energy harvesting and sensor-to-reader communications purposes. It is composed for a dipole antenna, a matching network, a differential rectifier, and a backscatter ASK modulator. The HF section uses a 1 Watt EIRP 860–960 MHz RF-link as an energy source and as a data transmission carrier. The performance of the energy harvester was characterized using the testbench shown in Figure 30. The HF section extracts 13.75 µW at a separation distance of 9.5 m from the RF generator, showing a overall power conversion efficiency of 10.92% and an input power sensitivity of −8.99 dBm. In addition, the response of the backscatter ASK modulator was characterized by means of the testbench shown in Figure 31. It can be observed in Figure 33 how lateral sidebands were generated at 910 MHz $\pm f_{osc}$, where the frequency of the oscillator is used to map the PTAT $I_p$ current variation into a frequency deviation $f_{osc}$ as can be seen in Figure 34; this testbench also serves to corroborate the correct operation of the temperature sensor.

The PM stage is composed of a shunt regulator, a voltage/current reference and an LDO voltage regulator. Likewise, the LF section is made up of an FVF oscillator and a voltage buffer. In order to decrease the sensitivity of the FVF oscillator to $V_{D{D}_2}$ power supply variations, a very robust PM stage was designed to provide a very stable $V_{D{D}_2}$ power supply, a temperature-compensated voltage and current references, $V_{REF}$ and $I_{TC}$, and a PTAT $I_p$ current reference. The $V_{D{D}_2}$ voltage power supply is delivered by the LDO. It can be seen in Figure 17a that the maximum $V_{D{D}_2}$ voltage deviation is only 900 µV. This small $V_{D{D}_2}$ variation occurs when the input voltage of the LDO is varied from 1 V to 1.8 V. However, the input voltage of the LDO will never reach 1.8 V as the shunt regulator limits this value to 1.45 V as it can be appreciated in Figure 19a. Therefore, a $V_{D{D}_2}$ deviation lower than 900 µV is expected. The temperature-compensated voltage and current references, $V_{REF}$ and $I_{TC}$, were characterized using the testbench shown in Figure 27. The measured $I_{TC}$ showed a temperature coefficient of 383.33 ppm/°C, Figure 28a, while the measured $V_{REF}$ exhibited a 400 ppm/°C temperature coefficient, Figure 28b.

Figure 35 shows how the 13.75 µW of harvested power are consumed by the main building blocks that compose the proposed temperature sensor prototype. The most power-hungry circuit is the three-stage rectifier, consuming 11.59 µW, which represents 87% of the total available power. This high power consumption can be explained by means of the Power Conversion Efficiency (PCE) that quantifies the power losses in the three-stage rectifier. The remaining 13% of the total power (1.7875 µW) are used by the current/voltage references, the shunt regulator, the LDO, and the PTC temperature sensor.

On the other hand, to reduce the effect of the Radio Frequency Interference (RFI) on the performance of the proposed temperature sensor prototype, the circuit layout has to be optimized to reduce as much as possible the parasitic coupling of the metal interconnections with the substrate [59]. This special consideration must be taken into account in the transistors $m_1-m_5$ of current/voltage reference (Figure 6 and Figure 7), in the transistor $m_{pass}$ of the LDO (Figure 8), and in the transistors $m_1-m_2$ of the HF section (Figure 9). A carefully planned layout on the transistors $m_1-m_5$ of current/voltage reference will help to reduce any drift on the nominal values of $I_P$, $I_C$ and $V_{REF}$. Likewise, the use of top-metal layers to layout the transistor $m_{pass}$ of the LDO will reduce the noise that is injected into the $V_{D{D}_2}$ supply voltage of the temperature sensor. Although it is advisable to apply the same special consideration to transistors $m_1-m_2$ in the HF section, the noise generated by the RFI is filtered by the reservoir capacitor $C_L$.

5. Conclusions

A self-powered UHF passive tag prototype for biomedical temperature monitoring has been proposed, modeled, and experimentally verified. A bottom-up design methodology was also discussed and addressed. The proposed passive sensor was tested using a 1 W EIRP 860–960 MHz RF-link, which was employed as an energy source and as a data carrier. The whole sensor registered a power consumption of 13.75 µW, which represented a power conversion efficiency of 10.92%, and achieved a read range of 9.5 m. The temperature is sensed through the variation of a Proportional To Absolute Temperature (PTAT) current which is fed into a Flipped-Voltage-Follower (FVF) current-mode ring oscillator, which generated a proportional deviation in the frequency of the ring oscillator with respect to the temperature. The FVF current-mode ring oscillator is used for the first time in the literature. This temperature sensing mechanism allowed that the sensor measured temperature gradients between 0 ${}^{\circ }$C to 60 ${}^{\circ }$C with a 823.29 Hz/${}^{\circ }$C sensitivity and a 13.67 Hz/${}^{\circ }$C standard error over linear regression. A prototype was fabricated using a 0.18 µm CMOS standard process, with a silicon area consumption of 1065 µm × 560 µm. The overall size of the implemented self-powered passive tag prototype, including chip and antenna, was 8 cm × 2 cm. Measurements and characterizations have shown that the proposed self-powered passive tag prototype could be used to measure biomedical temperature signals.