A CMOS Low Noise Amplifier (LNA) is designed for RF application by using TSMC RF CMOS 0.18µm technology. Noise cancellation technique is applied to cascode transistor of the LNA core; because source parasitic capacitors of this transistor cause the noise figure increases in high frequency. The linearity of LNA is modified by the second order interaction between the PMOS and NMOS transistors in cascode structure. With this topology lower noise figure, improved linearity and lower power dissipation can be attained. This LNA achieved maximum power gain of 15.3dB at 3GHz band, noise figure of lower than 2.5dB over the whole band of 3-5GHz and IIP₃ of +10dBm at 3GHz while drawing 7.42mA from 1.8V supply voltage.