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High quality and high speed cutting of 4H-SiC JFET wafers including PCM structures by using Thermal Laser Separation

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Abstract

The silicon carbide (SiC) market is gaining momentum hence productivity in device manufacturing has to be improved. The current transition from 100 mm SiC-wafers to 150 mm SiC-wafers requires novel processes in the front-end as well as the back-end of SiC-chip production. Dicing of fully processed SiC-wafers is becoming a bottleneck process since current state-of-the-art mechanical blade dicing faces heavy tool wear and achieves low throughput due to low feed rates in the range of only a few mm/s. This paper presents latest results of the novel dicing technology Thermal Laser Separation (TLS) applied for separating SiC-JFETs. We demonstrate for the first time that TLS is capable of dicing fully processed 4H-SiC wafers, including back side metal layer stacks, process control monitoring (PCM), and metal structures inside the dicing streets with feed rates up to 200 mm/s. TLS thus paves the way to efficient dicing of 150 mm SiC-wafers.

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acknowledgments

The authors would like to thank colleagues from Infineon Technologies AG in Villach providing sample product wafers.

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Lewke, D., Koitzsch, M., Dohnke, K.O. et al. High quality and high speed cutting of 4H-SiC JFET wafers including PCM structures by using Thermal Laser Separation. MRS Online Proceedings Library 1693, 55–60 (2014). https://doi.org/10.1557/opl.2014.566

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  • DOI: https://doi.org/10.1557/opl.2014.566

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