Dynamic Feedback Controlled Static Random Access Memory for Low Power Applications

In this paper, to improve leakage power consumption along with better cell stability, a 8T static random access memory (SRAM) cell is presented in this paper. The proposed static random access memory also shows better results in terms of leakage power, write static noise margin, write-ability, read margin and I _on/I _off. Further, these parameters are observed at 2-kilo bit (kb) array. It is observed that the leakage power is reduced to 82× and 75× of the conventional 6T static random access memory (SRAM) and read decoupled (RD) 8T SRAM, respectively at 300 mV VDD/Temp = 25 °C. Where at higher temperature values (T = 100 °C/300 mV VDD) the leakage power of proposed 8T SRAM is 280× and 270× better than that of C6T and RD8T SRAM, respectively. On the contrary, write static noise margin (WSNM), write trip point (WTP), read dynamic noise margin (RDNM) and I _on/I _off ratio are also improved by 7.1%, 43%, 7.4% and 74× than conventional 6T SRAM, respectively at 300 mV power supply. Similarly, the WSNM, WTP and I _on/I _off values are improved by 6.67%, 7.14% and 68× as compared to RD8T SRAM at 300 mV power supply.