Investigations on Short-Circuit Power Dissipation in Repeater Loaded VLSI Interconnects
Short-circuit power dissipations in CMOS repeater driven VLSI interconnects are analyzed. Both resistive (RC) and inductive (RLC) interconnect models are treated. Analytical methods to calculate short-circuit power is proposed. Good agreement between analytical and SPICE simulated results are obtained. Analytical error less than 10% is achieved. Analysis shows Short-circuit power increases with increase in interconnect resistance, inductance and capacitance. It also increases with increase in number of repeaters.
Keywords: INTERCONNECT; POWER DISSIPATION; REPEATER; VOLTAGE-SCALING
Document Type: Research Article
Publication date: 01 December 2007
- The electronic systems that can operate with very low power are of great technological interest. The growing research activity in the field of low power electronics requires a forum for rapid dissemination of important results: Journal of Low Power Electronics (JOLPE) is that international forum which offers scientists and engineers timely, peer-reviewed research in this field.
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