EURASIP Journal on Embedded Systems
Volume 2006 (2006), Article ID 82564, 8 pages
doi:10.1155/ES/2006/82564
Abstract
This paper presents the design and implementation of a feature
tracker on an embedded reconfigurable hardware system. Contrary to
other works, the focus here is on the efficient hardware/software
partitioning of the feature tracker algorithm, a viable data flow
management, as well as an efficient use of memory and processor
features. The implementation is done on a Xilinx Spartan 3
evaluation board and the results provided show the superiority of
our implementation compared to the other works.