Abstract
Predistortion (PD) lineariser for microwave power amplifiers (PAs) is an important topic
of research. With larger and larger bandwidth as it appears today in modern WiMax
standards as well as in multichannel base stations for 3GPP standards, the relatively
simple nonlinear effect of a PA becomes a complex memory-including function, severely
distorting the output signal. In this contribution, two digital PD algorithms are investigated for the linearisation of microwave PAs in mobile communications. The first one is an efficient and low-complexity
algorithm based on a memoryless model, called the simplicial canonical
piecewise linear (SCPWL) function that describes the static nonlinear characteristic
of the PA. The second algorithm is more general, approximating the pre-inverse filter
of a nonlinear PA iteratively using a Volterra model. The first simpler algorithm is
suitable for compensation of amplitude compression and amplitude-to-phase conversion,
for example, in mobile units with relatively small bandwidths. The second algorithm
can be used to linearise PAs operating with larger bandwidths, thus exhibiting memory
effects, for example, in multichannel base stations. A measurement testbed which includes a transmitter-receiver chain with a microwave PA is built for testing and prototyping of the proposed PD algorithms. In the testing phase, the PD algorithms are implemented using MATLAB (floating-point representation) and tested in record-and-playback mode. The iterative PD algorithm is then implemented on a Field Programmable Gate Array (FPGA) using fixed-point representation.
The FPGA implementation allows the pre-inverse filter to be tested in a real-time
mode. Measurement results show excellent linearisation capabilities of both the proposed
algorithms in terms of adjacent channel power suppression. It is also shown that
the fixed-point FPGA implementation of the iterative algorithm performs as well as the
floating-point implementation.