Abstract
A study has been carried out to improve metal-insulator-metal (MIM) capacitor's capacitance density and linearity performance. The scopes of the study included single MiM and stack MIM structures. Different dielectric schemes were evaluated with their corresponding capacitance density, breakdown voltages and linearity coefficient to voltage and temperature variation etc. characterised. Trade-off of capacitance density and linearity observed with respect to the dielectrics thickness. In this paper, a special layout design and a new integration concept from stack MIM device will be introduced, with this, we can achieve both high capacitance density as well as ultra low voltage coefficients of capacitance for the desirbale good analog performance on MIM passive devices.