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High-Density FeFET-based CAM Cell Design Via Multi-Dimensional Encoding

Published:05 June 2023Publication History

ABSTRACT

Content addressable memory is one of the most frequently used technologies in Data-centric applications due to its exceptional search parallelism capability. SRAM cells were initially used to implement CAM designs. Recent innovations proposed using compact nonvolatile memories instead. FeFETs emerged as a multi-level NVM device with promising potential and 2T FeFET CAM designs were studied. In this paper, a new potential is discussed for increasing the density efficiency of FeFET CAM architectures by adapting higher-dimensional encoding using 3T and 4T CAM designs. We propose a scalable greedy search algorithm for maximizing encoding capabilities. We compare the density, latency, accuracy, and energy consumption of our designs to standard 2T architecture demonstrating a 4x and 8x decrease in fail probability with up to 16% and 26.5% increase in memory density (bits/unit-area) in the 3T and 4T designs respectively.

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      cover image ACM Conferences
      GLSVLSI '23: Proceedings of the Great Lakes Symposium on VLSI 2023
      June 2023
      731 pages
      ISBN:9798400701252
      DOI:10.1145/3583781

      Copyright © 2023 ACM

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      Publication History

      • Published: 5 June 2023

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