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Multiple output minimization

Published:01 June 1985Publication History

ABSTRACT

This paper describes two logic minimization algorithms. CAMP (Computer Aided Minimization Procedure) minimizes single functions. The minterms are covered either by essential prime implicants or by selective prime implicants. The two types of prime implicants are determined one at a time thus completely avoiding the computationally expensive covering problem. The adjacency of a minterm, that depends upon the proximity of this minterm with respect to other minterms on the Karnaugh map, guides the determination of prime implicants. This procedure is nonheuristic and has proved to be very efficient for large number of input variables. The multiple output minimization (MOM) algorithm generates the product terms with maximum sharing between the output functions. In addition to using adjacency, this procedure is also guided by the frequency with which a minterm is used by the functions. Examples show the performance of this algorithm to be equal or better than many other minimization procedures.

References

  1. 1.R. K. Brayton, G. D. Hachtel, C. T. McMullen, and A. L. Sangiovanni-Vincente!!i, Logic Minimization Algorithms for VLSI Synthesis, Boston, MA: Kluwer Academic Publishers, 1984. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. 2.P. Agrawal and M. J. Meyer, 'Automation in the Design of Finite-State Machines,' VLSI Design, Vol. V, pp. 74-84, September 1984.Google ScholarGoogle Scholar
  3. 3.E. J. McCiuskcy, Introduction to the Theory of Switching Circuits, New York: McGraw-Hill, 1965.Google ScholarGoogle Scholar
  4. 4.N. N. Biswas, 'Minimization of Boolean Functions,' IEEE Trans. on Computers, Vol. C-20, pp. 925-929, August 1971.Google ScholarGoogle Scholar
  5. 5.Surcshchandcr, "Minimization of Switching Functions - A Fast Technique,' IEEE Trans. on Computer, Vol. C-24, pp. 753-756, July 1975.Google ScholarGoogle Scholar
  6. 6.V. T. Rhync, P. S. Noc, M. H. McKinncy, and U. W. Pooch, 'A New Technique for the Fast Minimization of Switching Functions," IEEE Trans. on Computers, Vol. C-26, pp. 757-764, August 1977.Google ScholarGoogle Scholar
  7. 7.H. A. Curtis, 'Adjacency Table Method of Deriving Minimal Sums,' IEEE Trans. on Computers, Vol. C-26, pp. 1136-1141, November 1977.Google ScholarGoogle Scholar
  8. 8.Z. Arevalo and J. G. Bredeson, 'A Method to Simplify a Boolean Function into a Near Minimal Sum-of-Products for Programmablc Logic Arrays,' IEEE Trans. on Computers, Vol. C-27, pp. 1028-1039, Novcml~r 1978.Google ScholarGoogle Scholar
  9. 9.G. Caruso, 'A Local Selection Algorithm for Switching Function Minimization,' IEEE Trans. on Computers, Vol. C-33, pp. 91- 97, January 1984.Google ScholarGoogle Scholar
  10. 10.N. N. Biswas, 'Computer Aided Minimization Procedure for Boolean Functions,' Proc. 21st Design Automation Conference, Albuqurque, NM, June 1984, pp. 669-702. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. 11.N. N. Biswas, Introduction to Logic and Switching Theory, New York: Gordon and Breach, 1975. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. 12.S. J. Hong, R. G. Cain, and D. L. Ostapko, "MINI: A Hcuristic Approach for Logic Minimization,' IBM Journal of Res. and Dev., Vol. 18, pp. 443-458, September 1974.Google ScholarGoogle ScholarDigital LibraryDigital Library

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            cover image ACM Conferences
            DAC '85: Proceedings of the 22nd ACM/IEEE Design Automation Conference
            June 1985
            838 pages
            ISBN:0818606355

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            IEEE Press

            Publication History

            • Published: 1 June 1985

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