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High performance messaging on workstations: Illinois fast messages (FM) for Myrinet

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Published:08 December 1995Publication History

ABSTRACT

The Convex SPP-1000 is the first commercial implementation of a new generation of scalable shared memory parallel computers with full cache coherence. It employs a hierarchical structure of processing communication and memory name-space management resources to provide a scalableNUMA environment. Ensembles of 8 HP PA-RISC7100 microprocessorsemploy an internal cross-bar switch and directory based cache coherence scheme to provide a tightly coupled SMP.Up to 16 processing ensembles are interconnected by a 4 ring network incorporating a full hardware implementation of the SCI protocol for a full system configuration of 128 processors. This paper presents the findings of a set of empirical studies using both synthetic test codes and full applications for the Earth and space sciences to characterize the performance properties of this new architecture. It is shown that overhead and latencies of global primitive mechanisms, while low in absolute time, are significantly more costly than similar functions local to an individual processor ensemble.

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                            cover image ACM Conferences
                            Supercomputing '95: Proceedings of the 1995 ACM/IEEE conference on Supercomputing
                            December 1995
                            875 pages
                            ISBN:0897918169
                            DOI:10.1145/224170
                            • Chairman:
                            • Sid Karin

                            Copyright © 1995 ACM

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                            Publication History

                            • Published: 8 December 1995

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                            Supercomputing '95 Paper Acceptance Rate69of241submissions,29%Overall Acceptance Rate1,516of6,373submissions,24%

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