Farinaz Koushanfar
ABSTRACT
This paper presents an overview of hardware and Integrated Circuits (IC) metering methods. IC metering or hardware metering refers to tools, methodologies, and protocols that enable post-fabrication tracking of the ICs. Metering enables prevention and detection of overbuilt and counterfeit ICs in the dominant semiconductor contract-foundry model. Post-silicon identification and tagging of the individual ICs fabricated by the same mask is a precursor for metering: In passive metering, the ICs are specifically identified, either in terms of their functionality, or by other forms of unique identification. The identified ICs may be matched against their record in a pre-formed database that could reveal unregistered ICs or overbuilt ICs (in case of collisions). In active metering, not only the ICs are uniquely identified, but also parts of the chip's functionality can be only accessed, locked (disabled), or unlocked (enabled) by the designer and/or IP rights owners using a high level knowledge of the design not transferred to the foundry. We provide a systematic overview of the field, along with a taxonomy of available methods.
- Y. Alkabani and F. Koushanfar. Active hardware metering for intellectual property protection and security. In USENIX Security Symp., pages 291--306, 2007. Google Scholar
Digital Library
- Y. Alkabani, F. Koushanfar, N. Kiyavash, and M. Potkonjak. Trusted integrated circuits: A nondestructive hidden characteristics extraction approach. In IH, pages 102--117, 2008. Google ScholarDigital Library
- Y. Alkabani, F. Koushanfar, and M. Potkonjak. Remote activation of ICs for piracy prevention and digital right management. In ICCAD, pages 674--677, 2007. Google ScholarDigital Library
- B. Barak, O. Goldreich, R. Impagliazzo, S. Rudich, A. Sahai, S. Vadhan, and K. Yang. On the (im)possibility of obfuscating programs. In CRYPTO, pages 1--18, 2001. Google ScholarDigital Library
- A. Baumgarten, A. Tyagi, and J. Zambreno. Preventing IC piracy using reconfigurable logic barriers. IEEE Design and Test of Computers, 27:66--75, 2010. Google ScholarDigital Library
- R. Chakraborty and S. Bhunia. Hardware protection and authentication through netlist level obfuscation. In ICCAD, pages 674--677, 2008. Google ScholarDigital Library
- S. Devadas and B. Gassend. Authentication of integrated circuits. US Patent 7,840,803, 2010. Application in 2002.Google Scholar
- B. Gassend, D. Clarke, M. van Dijk, and S. Devadas. Silicon physical random functions. In CCS, pages 148--160, 2002. Google ScholarDigital Library
- D. Holcomb, W. Burleson, and K. Fu. Power-up SRAM state as an identifying fingerprint and source of true random numbers. IEEE Transactions on Computers, 58(9):1198--1210, September 2009. Google ScholarDigital Library
- J. Huang and J. Lach. IC activation and user authentication for security-sensitive systems. In HOST, pages 76--80, 2008. Google ScholarDigital Library
- F. Koushanfar. Active integrated circuits metering techniques for piracy avoidance and digital rights management. Technical Report TREE1101, ECE Dept., Rice University, 2011.Google Scholar
- F. Koushanfar. Book Chapter in Introduction to Hardware Security and Trust, M. Tehranipoor and C. Wang editors, chapter Hardware metering: A survey. Springer, 2011.Google Scholar
- F. Koushanfar and G. Qu. Hardware metering. In Design Automation Conference, DAC, pages 490--493, 2001. Google ScholarDigital Library
- F. Koushanfar, G. Qu, and M. Potkonjak. Intellectual property metering. In IH), pages 81--95, 2001. Google ScholarDigital Library
- K. Lofstrom, W. R. Daasch, and D. Taylor. Ic identification circuit using device mismatch. In ISSCC, pages 372--373, 2000.Google ScholarCross Ref
- R. Maes, D. Schellekens, P. Tuyls, and I. Verbauwhede. Analysis and design of active IC metering schemes. In HOST, pages 74--81, 2009. Google ScholarDigital Library
- C. Mouli and W. Carriker. Future fab: How software is helping intel go nano-and beyond. IEEE Spectrum, March 2007. Google ScholarDigital Library
- J. Roy, F. Koushanfar, and I. Markov. Protecting bus-based hardware ip by secret sharing. In DAC, pages 846--851, 2008. Google ScholarDigital Library
- J. Roy, F. Koushanfar, and I. Markov. EPIC: Ending piracy of integrated circuits. In DATE, pages 1069--1074, 2008. Google ScholarDigital Library
- J. Roy, F. Koushanfar, and I. Markov. Ending piracy of integrated circuits. IEEE Computer, 43:30--38, 2010. Google ScholarDigital Library
- U. Rührmair, S. Devadas, and F. Koushanfar. Book Chapter in Introduction to Hardware Security and Trust, M. Tehranipoor and C. Wang editors, chapter Security based on Physical Unclonability and Disorder. Springer, 2011.Google Scholar
- B. Santo. Plans for next-gen chips imperiled. IEEE Spectrum, August 2007. Google ScholarDigital Library
- L. Yuan and G. Qu. Information hiding in finite state machine. In IH, pages 340--354, 2004. Google ScholarDigital Library
Index Terms
- Integrated circuits metering for piracy protection and digital rights management: an overview
Recommendations
A floating gate design for electrostatic discharge protection circuits
In this paper, a circuit design method for electrostatic discharge (ESD) protection is presented. It considers the gate floating state for ESD protection and negatively gate biased for leakage suppression under normal operations. The circuit is achieved ...
Comments