Surface State Generation in MOS Structure by Applying High Field to the SiO₂ Film

Effects of high electric fields applied to the gate oxide on MOS devices have been investigated. It is found that conventional MOS devices exhibit a shift of flatband voltage in the negative direction and a decrease of channel conductance as a consequence of the higher field applied (<7×10⁶V/cm) to the gate electrode. These degradations become significant as the applied field is increased regardless of its polarity. They are ascribed to surface state generation at the Si–SiO₂ interface and to defect formation in the oxide. The surface state density takes a maximum value, typically 10¹³/cm², for an applied field of 8.5×10⁶V/cm at 0.29eV below the conduction band edge. The equivalent parallel conductance vs. gate voltage curve with a gate-controlled diode shows a peak in the weak inversion region in addition to the ordinary peak in the depletion region. The peak in the weak inversion region can be attributed to minority carrier transitions between the surface states and the minority carrier energy band.